Scott Lahteine
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93cd66ac11
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Tweaky change from (C) to (c)
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2019-06-27 23:58:16 -05:00 |
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Scott Lahteine
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0feeef2604
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Update copyright in headers
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2019-02-12 15:30:11 -06:00 |
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Scott Lahteine
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5580773191
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Use FastIO, sanity-check LPC SD options, apply formatting (#12231)
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2018-10-26 15:23:02 -05:00 |
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Sam Lane
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d783400330
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Updates to STM32F7 HAL, for completeness (#11770)
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2018-09-09 03:26:15 -05:00 |
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Scott Lahteine
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6a3207391f
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Remove obsolete HAL_timer_restrain
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2018-08-31 16:17:22 -05:00 |
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Scott Lahteine
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0987ed2a18
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Use American English
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2018-08-22 17:16:18 -05:00 |
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etagle
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0566badcef
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Add memory barrier, optimal interrupt on-off
Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/)
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2018-05-20 02:39:34 -05:00 |
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Chris Pepper
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cc6d41e1d3
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Use a macro for HAL header redirection (#10380)
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2018-04-12 20:25:08 -05:00 |
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Scott Lahteine
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98d48fc731
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Followup to HAL_timer_restrain
Followup to #9985
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2018-03-07 22:18:37 -06:00 |
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Scott Lahteine
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d45f19d385
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Remove Unicode from var name
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2018-03-07 19:08:44 -06:00 |
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Chris Pepper
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a1a88ebabc
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HAL function to ensure min stepper interrupt interval (#9985)
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2018-03-07 17:53:25 -06:00 |
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Scott Lahteine
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a810e585db
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Drop HAL_timer_set_count
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2018-02-20 03:10:39 -06:00 |
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Scott Lahteine
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03d790451f
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[2.0.x] HAL timer set/get count => set/get compare (#9581)
To reduce confusion over the current timer count vs. the compare (aka "top") value. Caution: this re-uses the function name, changing its meaning.
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2018-02-10 20:42:00 -06:00 |
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Scott Lahteine
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42933c804a
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Cleanups for STM32F7
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2018-01-15 02:46:37 -06:00 |
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Morten
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a0246c5c96
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Add support for STM32F7 MCU
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2018-01-15 01:13:03 -06:00 |
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