a215725df6
Fix stepper pulse timing
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Always honor minimum period on stepper pulse generation, and fix timing calculations
Signed-off-by: etagle <ejtagle@hotmail.com >
2018-06-12 21:34:24 -05:00
4dbec774b5
HAL_*_TIMER_RATE => *_TIMER_RATE
2018-06-12 16:39:12 -05:00
d3c02410a8
[2.0.x] Small assorted collection of fixes and improvements ( #10911 )
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* Misc fixes and improvements
- Get rid of most critical sections on the Serial port drivers for AVR and DUE. Proper usage of FIFOs should allow interrupts to stay enabled without harm to queuing and dequeuing.
Also, with 8-bit indices (for AVR) and up to 32-bit indices (for ARM), there is no need to protect reads and writes to those indices.
- Simplify the XON/XOFF logic quite a bit. Much cleaner now (both for AVR and ARM)
- Prevent a race condition (edge case) that could happen when estimating the proper value for the stepper timer (by reading it) and writing the calculated value for the time to the next ISR by disabling interrupts in those critical and small sections of the code - The problem could lead to lost steps.
- Fix dual endstops not properly homing bug (maybe).
* Set position immediately when possible
2018-06-01 19:02:22 -05:00
d87257f63c
[2.0.x][LPC176x] Fix PIO build flags ( #10909 )
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Don't build and link with different flags, the binary may not work.
2018-05-31 19:08:31 -05:00
f89f7c4a82
[2.0.x][LPC176x][Build] Force single precision constants, disable freestanding ( #10892 )
2018-05-28 19:38:22 -05:00
9b9b62b218
delay(SERVO_DELAY) => safe_delay(servo_delay[servo_index])
2018-05-28 03:44:32 -05:00
1c0ad8bbae
wrong type of exit method
2018-05-26 08:17:03 -05:00
235facd545
install AVRDUDE 5.10, faster disk find for LPC1768 ( #10849 )
2018-05-25 20:26:48 -05:00
e2db509d58
[2.0.x] Update/Fix LPC1768 extra script upload_extra_script.py ( #10843 )
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* Use a different method to find the volume info in Windows
2018-05-25 04:31:18 -05:00
5f8591528e
Remove #pragmas that don't help c files
2018-05-23 23:47:16 -05:00
c89649b46e
Suppress U8glib build warnings
2018-05-23 02:47:36 -05:00
6dfbb39f83
[LPC1768] Add error-handling to upload script, update autobuild.py ( #10802 )
2018-05-20 21:22:04 -05:00
569df3fc0c
Fix interrupt-based endstop detection
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- Also implemented real endstop reading on interrupt.
2018-05-20 07:10:24 -05:00
0566badcef
Add memory barrier, optimal interrupt on-off
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Disabling an ISR on ARM has 3 instructions of latency. A Memory barrier is REQUIRED to ensure proper and predictable disabling. Memory barriers are expensive, so avoid disabling if already disabled (See https://mcuoneclipse.com/2015/10/16/nvic-disabling-interrupts-on-arm-cortex-m-and-the-need-for-a-memory-barrier-instruction/ )
2018-05-20 02:39:34 -05:00
206014a957
Fix LPC176x timer functions
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Co-Authored-By: ejtagle <ejtagle@hotmail.com >
2018-05-20 01:58:51 -05:00
9b64fdbc3a
[LPC176x] HAL: Add missing program space definition ( #10776 )
2018-05-19 15:37:54 -05:00
50270b53a0
Clear up some more compile warnings
2018-05-17 18:40:49 -05:00
40d7e12827
Removing warnings from compilation
2018-05-17 18:04:22 -05:00
fb608938f8
Prevent compilation of unused u8g-oriented code
2018-05-14 13:31:04 -05:00
37b15fe4cf
Reorder HAL timer header items
2018-05-13 16:50:39 -05:00
99ecdf59af
Smarter MIN, MAX, ABS macros
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Use macros that explicitly avoid double-evaluation and can be used for any datatype, replacing `min`, `max`, `abs`, `fabs`, `labs`, and `FABS`.
Co-Authored-By: ejtagle <ejtagle@hotmail.com >
2018-05-13 04:52:56 -05:00
9d98a62699
Followup to HAL optimizations and delays
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- Cleanups, fixes for Due HAL code.
- TC_IER is write-only. Use TC_IMR to test ISR state.
2018-05-13 00:46:23 -05:00
a1062eec5b
Better handling of DELAY_NS and DELAY_US ( #10716 )
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Co-Authored-By: ejtagle <ejtagle@hotmail.com >
2018-05-12 08:34:04 -05:00
d1b619be52
Standardize some hexadecimals
2018-05-08 09:19:18 -05:00
456cf971af
HAL FastIO cleanup and fixes
2018-04-26 00:40:16 -05:00
2578996631
[2.0.x] Emergency parser for multiple serial ports ( #10524 )
2018-04-25 20:58:00 -05:00
2242b98248
[LPC176x] Emergency Parser Feature ( #10516 )
2018-04-25 06:44:26 -05:00
a3ce8a3fcd
Add sanity checks for EMERGENCY_PARSER
2018-04-24 09:24:26 -05:00
0c428a66d9
Proper AVR preemptive interrupt handling ( #10496 )
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Also simplify logic on all ARM-based interrupts. Now, it is REQUIRED to properly configure interrupt priority. USART should have highest priority, followed by Stepper, and then all others.
2018-04-23 22:05:07 -05:00
29dda871cb
Patch "upload_disk" to make python happy
2018-04-13 22:27:08 -05:00
cc6d41e1d3
Use a macro for HAL header redirection ( #10380 )
2018-04-12 20:25:08 -05:00
85014cd132
[2.0.x] LPC1768 - automatic selection of upload disk ( #10374 )
2018-04-11 14:41:16 -05:00
ab715c70d1
TMC SPI sanity-check and pins debugging ( #10324 )
2018-04-06 20:24:54 -05:00
93305a2d5e
Fix some spellings
2018-04-02 03:03:37 -05:00
239902f861
Fix E2END and add EEPROM to Smart RAMPS
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Reference #9983
2018-03-10 06:57:31 -06:00
3c58ca181c
[2.0.x] Correct step pulse width on LPC1768, DUE & Teensy35_36 ( #10016 )
2018-03-09 02:11:28 -06:00
98d48fc731
Followup to HAL_timer_restrain
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Followup to #9985
2018-03-07 22:18:37 -06:00
ca577c1638
Fix up various spacing, comments, and typos
2018-03-07 21:09:08 -06:00
d45f19d385
Remove Unicode from var name
2018-03-07 19:08:44 -06:00
a1a88ebabc
HAL function to ensure min stepper interrupt interval ( #9985 )
2018-03-07 17:53:25 -06:00
beeed580b8
Implement digipots for MKS SBASE ( #9927 )
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Fix #9477
2018-03-04 15:14:47 -06:00
f3dbe19669
Tweaks to HAL codestyle
2018-02-25 04:38:17 -06:00
90fa423737
Preliminary cleanup of #include structure ( #9763 )
2018-02-23 00:52:52 -06:00
799e3b2b40
LPC1768 HAL formatting/comments
2018-02-22 14:36:17 -06:00
a810e585db
Drop HAL_timer_set_count
2018-02-20 03:10:39 -06:00
ca55f2927a
Pulldown pin mode support ( #9701 )
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Implemented for LPC1768.
2018-02-18 19:26:23 -06:00
03d790451f
[2.0.x] HAL timer set/get count => set/get compare ( #9581 )
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To reduce confusion over the current timer count vs. the compare (aka "top") value. Caution: this re-uses the function name, changing its meaning.
2018-02-10 20:42:00 -06:00
b939a2e88c
Watchdog conditional for LPC
2018-02-04 18:52:44 -06:00
0891b58c30
#ifdef tweaks
2018-02-04 16:36:30 -06:00
3d72fe0730
snapshot
2018-02-03 21:28:05 -06:00
