Standardize some hexadecimals
This commit is contained in:
		| @@ -839,7 +839,7 @@ | ||||
|       REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0); | ||||
|  | ||||
|       // Disable PIO on A26 and A27 | ||||
|       REG_PIOA_PDR = 0x0c000000; | ||||
|       REG_PIOA_PDR = 0x0C000000; | ||||
|       OUT_WRITE(SDSS, 1); | ||||
|  | ||||
|       // Reset SPI0 (from sam lib) | ||||
|   | ||||
| @@ -122,16 +122,16 @@ static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) { | ||||
|  | ||||
|     if ( rs == 0 ) | ||||
|       /* command */ | ||||
|       spiSend_sw_DUE(0x0f8); | ||||
|       spiSend_sw_DUE(0x0F8); | ||||
|     else | ||||
|        /* data */ | ||||
|       spiSend_sw_DUE(0x0fa); | ||||
|       spiSend_sw_DUE(0x0FA); | ||||
|  | ||||
|     for (i = 0; i < 4; i++)   // give the controller some time to process the data | ||||
|       u8g_10MicroDelay();     // 2 is bad, 3 is OK, 4 is safe | ||||
|   } | ||||
|  | ||||
|   spiSend_sw_DUE(val & 0x0f0); | ||||
|   spiSend_sw_DUE(val & 0x0F0); | ||||
|   spiSend_sw_DUE(val << 4); | ||||
| } | ||||
|  | ||||
|   | ||||
| @@ -74,7 +74,7 @@ extern "C" { | ||||
|  | ||||
| #define PLL_UPLL_HZ     480000000 | ||||
|  | ||||
| #define PLL_COUNT           0x3fU | ||||
| #define PLL_COUNT           0x3FU | ||||
|  | ||||
| enum pll_source { | ||||
| 	PLL_SRC_MAINCK_4M_RC        = OSC_MAINCK_4M_RC,     //!< Internal 4MHz RC oscillator. | ||||
|   | ||||
| @@ -96,13 +96,13 @@ struct scsi_inquiry_data { | ||||
| #define  SCSI_INQ_DT_CD_DVD      0x05   //!< CD/DVD device | ||||
| #define  SCSI_INQ_DT_OPTICAL     0x07   //!< Optical Memory | ||||
| #define  SCSI_INQ_DT_MC          0x08   //!< Medium Changer | ||||
| #define  SCSI_INQ_DT_ARRAY       0x0c   //!< Storage Array Controller | ||||
| #define  SCSI_INQ_DT_ENCLOSURE   0x0d   //!< Enclosure Services | ||||
| #define  SCSI_INQ_DT_RBC         0x0e   //!< Simplified Direct Access | ||||
| #define  SCSI_INQ_DT_OCRW        0x0f   //!< Optical card reader/writer | ||||
| #define  SCSI_INQ_DT_ARRAY       0x0C   //!< Storage Array Controller | ||||
| #define  SCSI_INQ_DT_ENCLOSURE   0x0D   //!< Enclosure Services | ||||
| #define  SCSI_INQ_DT_RBC         0x0E   //!< Simplified Direct Access | ||||
| #define  SCSI_INQ_DT_OCRW        0x0F   //!< Optical card reader/writer | ||||
| #define  SCSI_INQ_DT_BCC         0x10   //!< Bridge Controller Commands | ||||
| #define  SCSI_INQ_DT_OSD         0x11   //!< Object-based Storage | ||||
| #define  SCSI_INQ_DT_NONE        0x1f   //!< No Peripheral | ||||
| #define  SCSI_INQ_DT_NONE        0x1F   //!< No Peripheral | ||||
| 	uint8_t flags1; //!< Flags (byte 1) | ||||
| #define  SCSI_INQ_RMB            0x80   //!< Removable Medium | ||||
| 	uint8_t version; //!< Version | ||||
| @@ -213,17 +213,17 @@ enum scsi_sense_key { | ||||
| 	SCSI_SK_DATA_PROTECT = 0x7, | ||||
| 	SCSI_SK_BLANK_CHECK = 0x8, | ||||
| 	SCSI_SK_VENDOR_SPECIFIC = 0x9, | ||||
| 	SCSI_SK_COPY_ABORTED = 0xa, | ||||
| 	SCSI_SK_ABORTED_COMMAND = 0xb, | ||||
| 	SCSI_SK_VOLUME_OVERFLOW = 0xd, | ||||
| 	SCSI_SK_MISCOMPARE = 0xe, | ||||
| 	SCSI_SK_COPY_ABORTED = 0xA, | ||||
| 	SCSI_SK_ABORTED_COMMAND = 0xB, | ||||
| 	SCSI_SK_VOLUME_OVERFLOW = 0xD, | ||||
| 	SCSI_SK_MISCOMPARE = 0xE, | ||||
| }; | ||||
|  | ||||
| /* Additional Sense Code / Additional Sense Code Qualifier pairs */ | ||||
| enum scsi_asc_ascq { | ||||
| 	SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000, | ||||
| 	SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405, | ||||
| 	SCSI_ASC_WRITE_ERROR = 0x0c00, | ||||
| 	SCSI_ASC_WRITE_ERROR = 0x0C00, | ||||
| 	SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100, | ||||
| 	SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000, | ||||
| 	SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400, | ||||
| @@ -242,7 +242,7 @@ enum scsi_asc_ascq { | ||||
| enum scsi_spc_mode { | ||||
| 	SCSI_MS_MODE_VENDOR_SPEC = 0x00, | ||||
| 	SCSI_MS_MODE_INFEXP = 0x1C,    // Informational exceptions control page | ||||
| 	SCSI_MS_MODE_ALL = 0x3f, | ||||
| 	SCSI_MS_MODE_ALL = 0x3F, | ||||
| }; | ||||
|  | ||||
| /** | ||||
| @@ -289,7 +289,7 @@ static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) | ||||
|  | ||||
| static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) | ||||
| { | ||||
| 	return cdb[2] & 0x3f; | ||||
| 	return cdb[2] & 0x3F; | ||||
| } | ||||
|  | ||||
| static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) | ||||
|   | ||||
| @@ -527,7 +527,7 @@ static bool udc_req_std_dev_set_feature(void) | ||||
| 		if (!udd_is_high_speed()) { | ||||
| 			break; | ||||
| 		} | ||||
| 		if (udd_g_ctrlreq.req.wIndex & 0xff) { | ||||
| 		if (udd_g_ctrlreq.req.wIndex & 0xFF) { | ||||
| 			break; | ||||
| 		} | ||||
| 		// Unconfigure the device, terminating all ongoing requests | ||||
| @@ -618,7 +618,7 @@ static bool udc_req_std_dev_get_str_desc(void) | ||||
| 	uint8_t str_length = 0; | ||||
|  | ||||
| 	// Link payload pointer to the string corresponding at request | ||||
| 	switch (udd_g_ctrlreq.req.wValue & 0xff) { | ||||
| 	switch (udd_g_ctrlreq.req.wValue & 0xFF) { | ||||
| 	case 0: | ||||
| 		udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid, | ||||
| 				sizeof(udc_string_desc_languageid)); | ||||
| @@ -674,7 +674,7 @@ static bool udc_req_std_dev_get_descriptor(void) | ||||
| { | ||||
| 	uint8_t conf_num; | ||||
|  | ||||
| 	conf_num = udd_g_ctrlreq.req.wValue & 0xff; | ||||
| 	conf_num = udd_g_ctrlreq.req.wValue & 0xFF; | ||||
|  | ||||
| 	// Check descriptor ID | ||||
| 	switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) { | ||||
|   | ||||
| @@ -271,7 +271,7 @@ enum usb_langid { | ||||
| /** | ||||
|  * \brief Mask selecting the index part of an endpoint address | ||||
|  */ | ||||
| #define  USB_EP_ADDR_MASK     0x0f | ||||
| #define  USB_EP_ADDR_MASK     0x0F | ||||
|  | ||||
| //! \brief USB address identifier | ||||
| typedef uint8_t usb_add_t; | ||||
|   | ||||
| @@ -225,7 +225,7 @@ bool usb_task_extra_string(void) { | ||||
|   uint8_t str_lgt = 0; | ||||
|  | ||||
|   // Link payload pointer to the string corresponding at request | ||||
|   switch (udd_g_ctrlreq.req.wValue & 0xff) { | ||||
|   switch (udd_g_ctrlreq.req.wValue & 0xFF) { | ||||
|   case UDI_CDC_IAD_STRING_ID: | ||||
|     str_lgt = sizeof(udi_cdc_name) - 1; | ||||
|     str = udi_cdc_name; | ||||
|   | ||||
| @@ -247,7 +247,7 @@ uint16_t HAL_adc_get_result(void) { | ||||
|     data = lowpass_filter[adc_channel].update(data); | ||||
|   #endif | ||||
|  | ||||
|   return ((data >> 2) & 0x3ff);    // return 10bit value as Marlin expects | ||||
|   return ((data >> 2) & 0x3FF);    // return 10bit value as Marlin expects | ||||
| } | ||||
|  | ||||
| #define SBIT_CNTEN     0 | ||||
|   | ||||
| @@ -83,14 +83,14 @@ | ||||
|   } | ||||
|  | ||||
|   uint8_t spiRec() { | ||||
|     uint8_t b = spiTransfer(0xff); | ||||
|     uint8_t b = spiTransfer(0xFF); | ||||
|     return b; | ||||
|   } | ||||
|  | ||||
|   void spiRead(uint8_t*buf, uint16_t nbyte) { | ||||
|     if (nbyte == 0) return; | ||||
|     for (int i = 0; i < nbyte; i++) { | ||||
|       buf[i] = spiTransfer(0xff); | ||||
|       buf[i] = spiTransfer(0xFF); | ||||
|     } | ||||
|   } | ||||
|  | ||||
|   | ||||
| @@ -213,7 +213,7 @@ void LPC1768_PWM_sort(void) { | ||||
|   } | ||||
| } | ||||
|  | ||||
| bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xff */) { | ||||
| bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xFF */) { | ||||
|  | ||||
|   pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF));  // Sometimes the upper byte is garbled | ||||
|  | ||||
|   | ||||
| @@ -79,7 +79,7 @@ | ||||
|  | ||||
|   #include <U8glib.h> | ||||
|  | ||||
|   #define I2C_SLA         (0x3c*2) | ||||
|   #define I2C_SLA         (0x3C*2) | ||||
|   //#define I2C_CMD_MODE  0x080 | ||||
|   #define I2C_CMD_MODE    0x000 | ||||
|   #define I2C_DATA_MODE   0x040 | ||||
|   | ||||
| @@ -68,7 +68,7 @@ void delayMicroseconds(uint32_t us); | ||||
| //void digitalWrite(int16_t pin, uint8_t pin_status); | ||||
|  | ||||
|  | ||||
|   #define I2C_SLA         (0x3c*2) | ||||
|   #define I2C_SLA         (0x3C*2) | ||||
|   //#define I2C_CMD_MODE  0x080 | ||||
|   #define I2C_CMD_MODE    0x000 | ||||
|   #define I2C_DATA_MODE   0x040 | ||||
|   | ||||
| @@ -87,16 +87,16 @@ | ||||
|  | ||||
|       if ( rs == 0 ) | ||||
|         /* command */ | ||||
|         spiSend(0x0f8); | ||||
|         spiSend(0x0F8); | ||||
|       else | ||||
|          /* data */ | ||||
|         spiSend(0x0fa); | ||||
|         spiSend(0x0FA); | ||||
|  | ||||
|       for( i = 0; i < 4; i++ )   // give the controller some time to process the data | ||||
|         u8g_10MicroDelay();      // 2 is bad, 3 is OK, 4 is safe | ||||
|     } | ||||
|  | ||||
|     spiSend(val & 0x0f0); | ||||
|     spiSend(val & 0x0F0); | ||||
|     spiSend(val << 4); | ||||
|   } | ||||
|  | ||||
|   | ||||
| @@ -73,16 +73,16 @@ | ||||
|  | ||||
|       if ( rs == 0 ) | ||||
|         /* command */ | ||||
|         swSpiTransfer(0x0f8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|         swSpiTransfer(0x0F8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|       else | ||||
|          /* data */ | ||||
|          swSpiTransfer(0x0fa, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|          swSpiTransfer(0x0FA, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|  | ||||
|       for( i = 0; i < 4; i++ )   // give the controller some time to process the data | ||||
|         u8g_10MicroDelay();      // 2 is bad, 3 is OK, 4 is safe | ||||
|     } | ||||
|  | ||||
|     swSpiTransfer(val & 0x0f0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|     swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|     swSpiTransfer(val << 4, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); | ||||
|   } | ||||
|  | ||||
|   | ||||
| @@ -68,7 +68,7 @@ | ||||
| //definitions for the chopper config register | ||||
| #define CHOPPER_MODE_STANDARD 0x0ul | ||||
| #define CHOPPER_MODE_T_OFF_FAST_DECAY 0x4000ul | ||||
| #define T_OFF_PATTERN 0xful | ||||
| #define T_OFF_PATTERN 0xFul | ||||
| #define RANDOM_TOFF_TIME 0x2000ul | ||||
| #define BLANK_TIMING_PATTERN 0x18000ul | ||||
| #define BLANK_TIMING_SHIFT 15 | ||||
| @@ -85,7 +85,7 @@ | ||||
| #define CURRENT_DOWN_STEP_SPEED_PATTERN 0x6000ul | ||||
| #define SE_MAX_PATTERN 0xF00ul | ||||
| #define SE_CURRENT_STEP_WIDTH_PATTERN 0x60ul | ||||
| #define SE_MIN_PATTERN 0xful | ||||
| #define SE_MIN_PATTERN 0xFul | ||||
|  | ||||
| //definitions for stall guard2 current register | ||||
| #define STALL_GUARD_FILTER_ENABLED 0x10000ul | ||||
|   | ||||
| @@ -80,7 +80,7 @@ void UnwInitState(UnwState * const state,     /**< Pointer to structure to fill. | ||||
| // Detect if function names are available | ||||
| static int __attribute__ ((noinline)) has_function_names(void) { | ||||
|   uint32_t flag_word = ((uint32_t*)(((uint32_t)(&has_function_names)) & (-4))) [-1]; | ||||
|   return ((flag_word & 0xff000000) == 0xff000000) ? 1 : 0; | ||||
|   return ((flag_word & 0xFF000000) == 0xFF000000) ? 1 : 0; | ||||
| } | ||||
|  | ||||
| /** | ||||
|   | ||||
| @@ -104,7 +104,7 @@ typedef struct { | ||||
|  *  Macros | ||||
|  **************************************************************************/ | ||||
|  | ||||
| #define M_IsOriginValid(v) (((v) & 0x7f) ? true : false) | ||||
| #define M_IsOriginValid(v) (((v) & 0x7F) ? true : false) | ||||
| #define M_Origin2Str(v)    ((v) ? "VALID" : "INVALID") | ||||
|  | ||||
| #if defined(UNW_DEBUG) | ||||
|   | ||||
| @@ -28,7 +28,7 @@ | ||||
| static int32_t signExtend11(uint16_t value) { | ||||
|  | ||||
|   if(value & 0x400) { | ||||
|     value |= 0xfffff800; | ||||
|     value |= 0xFFFFF800; | ||||
|   } | ||||
|  | ||||
|   return value; | ||||
| @@ -66,7 +66,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|     /* | ||||
|      * Detect 32bit thumb instructions | ||||
|      */ | ||||
|     if ((instr & 0xe000) == 0xe000 && (instr & 0x1800) != 0) { | ||||
|     if ((instr & 0xE000) == 0xE000 && (instr & 0x1800) != 0) { | ||||
|       uint16_t instr2; | ||||
|  | ||||
|       /* Check next address */ | ||||
| @@ -83,7 +83,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|        * Load/Store multiple: Only interpret | ||||
|        *  PUSH and POP | ||||
|        */ | ||||
|       if ((instr & 0xfe6f) == 0xe82d) { | ||||
|       if ((instr & 0xFE6F) == 0xE82D) { | ||||
|         bool     L     = (instr &  0x10) ? true : false; | ||||
|         uint16_t rList = instr2; | ||||
|  | ||||
| @@ -171,7 +171,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * PUSH register | ||||
|        */ | ||||
|       else if (instr == 0xf84d && (instr2 & 0x0fff) == 0x0d04) { | ||||
|       else if (instr == 0xF84D && (instr2 & 0x0FFF) == 0x0D04) { | ||||
|         uint8_t r = instr2 >> 12; | ||||
|  | ||||
|         /* Store to memory: PUSH */ | ||||
| @@ -187,7 +187,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * POP register | ||||
|        */ | ||||
|       else if (instr == 0xf85d && (instr2 & 0x0fff) == 0x0b04) { | ||||
|       else if (instr == 0xF85D && (instr2 & 0x0FFF) == 0x0B04) { | ||||
|         uint8_t r = instr2 >> 12; | ||||
|  | ||||
|         /* Load from memory: POP */ | ||||
| @@ -246,7 +246,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * TBB / TBH | ||||
|        */ | ||||
|       else if ((instr & 0xfff0) == 0xe8d0 && (instr2 & 0xffe0) == 0xf000) { | ||||
|       else if ((instr & 0xFFF0) == 0xE8D0 && (instr2 & 0xFFE0) == 0xF000) { | ||||
|         /* We are only interested in | ||||
|          * the forms | ||||
|          *  TBB [PC, ...] | ||||
| @@ -254,8 +254,8 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|          * as those are used by the C compiler to implement | ||||
|          * the switch clauses | ||||
|          */ | ||||
|         uint8_t rn = instr & 0xf; | ||||
|         uint8_t rm = instr2 & 0xf; | ||||
|         uint8_t rn = instr & 0xF; | ||||
|         uint8_t rm = instr2 & 0xF; | ||||
|         bool H = (instr2 & 0x10) ? true : false; | ||||
|  | ||||
|         UnwPrintd5("TB%c [r%d,r%d%s]\n", H ? 'H' : 'B', rn, rm, H ? ",LSL #1" : ""); | ||||
| @@ -280,19 +280,19 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * Unconditional branch | ||||
|        */ | ||||
|       else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x9000) { | ||||
|       else if ((instr & 0xF800) == 0xF000 && (instr2 & 0xD000) == 0x9000) { | ||||
|         uint32_t v; | ||||
|  | ||||
|         uint8_t      S = (instr & 0x400) >> 10; | ||||
|         uint16_t imm10 = (instr & 0x3ff); | ||||
|         uint16_t imm10 = (instr & 0x3FF); | ||||
|         uint8_t     J1 = (instr2 & 0x2000) >> 13; | ||||
|         uint8_t     J2 = (instr2 & 0x0800) >> 11; | ||||
|         uint16_t imm11 = (instr2 & 0x7ff); | ||||
|         uint16_t imm11 = (instr2 & 0x7FF); | ||||
|  | ||||
|         uint8_t I1 = J1 ^ S ^ 1; | ||||
|         uint8_t I2 = J2 ^ S ^ 1; | ||||
|         uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1); | ||||
|         if (S) imm32 |= 0xfe000000; | ||||
|         if (S) imm32 |= 0xFE000000; | ||||
|  | ||||
|         UnwPrintd2("B %d \n", imm32); | ||||
|  | ||||
| @@ -321,18 +321,18 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * Branch with link | ||||
|        */ | ||||
|       else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0xd000) { | ||||
|       else if ((instr & 0xF800) == 0xF000 && (instr2 & 0xD000) == 0xD000) { | ||||
|  | ||||
|         uint8_t      S = (instr & 0x400) >> 10; | ||||
|         uint16_t imm10 = (instr & 0x3ff); | ||||
|         uint16_t imm10 = (instr & 0x3FF); | ||||
|         uint8_t     J1 = (instr2 & 0x2000) >> 13; | ||||
|         uint8_t     J2 = (instr2 & 0x0800) >> 11; | ||||
|         uint16_t imm11 = (instr2 & 0x7ff); | ||||
|         uint16_t imm11 = (instr2 & 0x7FF); | ||||
|  | ||||
|         uint8_t I1 = J1 ^ S ^ 1; | ||||
|         uint8_t I2 = J2 ^ S ^ 1; | ||||
|         uint32_t imm32 = (S << 24) | (I1 << 23) | (I2 << 22) |(imm10 << 12) | (imm11 << 1); | ||||
|         if (S) imm32 |= 0xfe000000; | ||||
|         if (S) imm32 |= 0xFE000000; | ||||
|  | ||||
|         UnwPrintd2("BL %d \n", imm32); | ||||
|  | ||||
| @@ -377,18 +377,18 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|       /* | ||||
|        * Conditional branches. Usually not taken, unless infinite loop is detected | ||||
|        */ | ||||
|       else if ((instr & 0xf800) == 0xf000 && (instr2 & 0xd000) == 0x8000) { | ||||
|       else if ((instr & 0xF800) == 0xF000 && (instr2 & 0xD000) == 0x8000) { | ||||
|  | ||||
|         uint8_t      S = (instr & 0x400) >> 10; | ||||
|         uint16_t  imm6 = (instr &  0x3f); | ||||
|         uint16_t  imm6 = (instr &  0x3F); | ||||
|         uint8_t     J1 = (instr2 & 0x2000) >> 13; | ||||
|         uint8_t     J2 = (instr2 & 0x0800) >> 11; | ||||
|         uint16_t imm11 = (instr2 & 0x7ff); | ||||
|         uint16_t imm11 = (instr2 & 0x7FF); | ||||
|  | ||||
|         uint8_t I1 = J1 ^ S ^ 1; | ||||
|         uint8_t I2 = J2 ^ S ^ 1; | ||||
|         uint32_t imm32 = (S << 20) | (I1 << 19) | (I2 << 18) |(imm6 << 12) | (imm11 << 1); | ||||
|         if (S) imm32 |= 0xffe00000; | ||||
|         if (S) imm32 |= 0xFFE00000; | ||||
|  | ||||
|         UnwPrintd2("Bcond %d\n", imm32); | ||||
|  | ||||
| @@ -412,9 +412,9 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|        * PC-relative load | ||||
|        *  LDR Rd,[PC, #+/-imm] | ||||
|        */ | ||||
|       else if((instr & 0xff7f) == 0xf85f) { | ||||
|         uint8_t  rt    = (instr2 & 0xf000) >> 12; | ||||
|         uint8_t  imm12 = (instr2 & 0x0fff); | ||||
|       else if((instr & 0xFF7F) == 0xF85F) { | ||||
|         uint8_t  rt    = (instr2 & 0xF000) >> 12; | ||||
|         uint8_t  imm12 = (instr2 & 0x0FFF); | ||||
|         bool     A     = (instr  & 0x80) ? true : false; | ||||
|         uint32_t address; | ||||
|  | ||||
| @@ -434,10 +434,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|        *  We are only interested when destination is PC. | ||||
|        *  LDR Rt,[Rn , #n] | ||||
|        */ | ||||
|       else if ((instr & 0xfff0) == 0xf8d0) { | ||||
|         uint8_t     rn = (instr  & 0xf); | ||||
|         uint8_t     rt = (instr2 & 0xf000) >> 12; | ||||
|         uint16_t imm12 = (instr2 & 0xfff); | ||||
|       else if ((instr & 0xFFF0) == 0xF8D0) { | ||||
|         uint8_t     rn = (instr  & 0xF); | ||||
|         uint8_t     rt = (instr2 & 0xF000) >> 12; | ||||
|         uint16_t imm12 = (instr2 & 0xFFF); | ||||
|  | ||||
|         /* If destination is PC and we don't know the source value, then fail */ | ||||
|         if (!M_IsOriginValid(state->regData[rn].o)) { | ||||
| @@ -456,10 +456,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|        *  LDR Rt,[Rn], #+/-n] | ||||
|        *  LDR Rt,[Rn, #+/-n]! | ||||
|        */ | ||||
|       else if ((instr & 0xfff0) == 0xf850 && (instr2 & 0x0800) == 0x0800) { | ||||
|         uint8_t     rn = (instr  & 0xf); | ||||
|         uint8_t     rt = (instr2 & 0xf000) >> 12; | ||||
|         uint16_t  imm8 = (instr2 & 0xff); | ||||
|       else if ((instr & 0xFFF0) == 0xF850 && (instr2 & 0x0800) == 0x0800) { | ||||
|         uint8_t     rn = (instr  & 0xF); | ||||
|         uint8_t     rt = (instr2 & 0xF000) >> 12; | ||||
|         uint16_t  imm8 = (instr2 & 0xFF); | ||||
|         bool         P = (instr2 & 0x400) ? true : false; | ||||
|         bool         U = (instr2 & 0x200) ? true : false; | ||||
|         bool         W = (instr2 & 0x100) ? true : false; | ||||
| @@ -493,10 +493,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|        *   ldr  Rt, [Rn, Rm, lsl #x] | ||||
|        *  Where Rt is PC, Rn value is known, Rm is not known or unknown | ||||
|        */ | ||||
|       else if ((instr & 0xfff0) == 0xf850 && (instr2 & 0x0fc0) == 0x0000) { | ||||
|         uint8_t   rn = (instr  & 0xf); | ||||
|         uint8_t   rt = (instr2 & 0xf000) >> 12; | ||||
|         uint8_t   rm = (instr2 & 0xf); | ||||
|       else if ((instr & 0xFFF0) == 0xF850 && (instr2 & 0x0FC0) == 0x0000) { | ||||
|         uint8_t   rn = (instr  & 0xF); | ||||
|         uint8_t   rt = (instr2 & 0xF000) >> 12; | ||||
|         uint8_t   rm = (instr2 & 0xF); | ||||
|         uint8_t imm2 = (instr2 & 0x30) >> 4; | ||||
|  | ||||
|         if (!M_IsOriginValid(state->regData[rn].o) || | ||||
| @@ -534,10 +534,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  LSR Rd, Rs, #Offset5 | ||||
|      *  ASR Rd, Rs, #Offset5 | ||||
|      */ | ||||
|     else if((instr & 0xe000) == 0x0000 && (instr & 0x1800) != 0x1800) { | ||||
|     else if((instr & 0xE000) == 0x0000 && (instr & 0x1800) != 0x1800) { | ||||
|       bool signExtend; | ||||
|       uint8_t op      = (instr & 0x1800) >> 11; | ||||
|       uint8_t offset5 = (instr & 0x07c0) >>  6; | ||||
|       uint8_t offset5 = (instr & 0x07C0) >>  6; | ||||
|       uint8_t rs      = (instr & 0x0038) >>  3; | ||||
|       uint8_t rd      = (instr & 0x0007); | ||||
|  | ||||
| @@ -562,7 +562,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|           signExtend = (state->regData[rs].v & 0x8000) ? true : false; | ||||
|           state->regData[rd].v = state->regData[rs].v >> offset5; | ||||
|           if(signExtend) { | ||||
|             state->regData[rd].v |= 0xffffffff << (32 - offset5); | ||||
|             state->regData[rd].v |= 0xFFFFFFFF << (32 - offset5); | ||||
|           } | ||||
|           state->regData[rd].o = state->regData[rs].o; | ||||
|           state->regData[rd].o |= REG_VAL_ARITHMETIC; | ||||
| @@ -575,10 +575,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  SUB Rd, Rs, Rn | ||||
|      *  SUB Rd, Rs, #Offset3 | ||||
|      */ | ||||
|     else if((instr & 0xf800) == 0x1800) { | ||||
|     else if((instr & 0xF800) == 0x1800) { | ||||
|       bool    I  = (instr & 0x0400) ? true : false; | ||||
|       bool    op = (instr & 0x0200) ? true : false; | ||||
|       uint8_t rn = (instr & 0x01c0) >> 6; | ||||
|       uint8_t rn = (instr & 0x01C0) >> 6; | ||||
|       uint8_t rs = (instr & 0x0038) >> 3; | ||||
|       uint8_t rd = (instr & 0x0007); | ||||
|  | ||||
| @@ -627,11 +627,11 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  ADD Rd, #Offset8 | ||||
|      *  SUB Rd, #Offset8 | ||||
|      */ | ||||
|     else if((instr & 0xe000) == 0x2000) { | ||||
|     else if((instr & 0xE000) == 0x2000) { | ||||
|  | ||||
|       uint8_t op      = (instr & 0x1800) >> 11; | ||||
|       uint8_t rd      = (instr & 0x0700) >>  8; | ||||
|       uint8_t offset8 = (instr & 0x00ff); | ||||
|       uint8_t offset8 = (instr & 0x00FF); | ||||
|  | ||||
|       switch(op) { | ||||
|         case 0: /* MOV */ | ||||
| @@ -676,8 +676,8 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  BIC Rd, Rs | ||||
|      *  MVN Rd, Rs | ||||
|      */ | ||||
|     else if((instr & 0xfc00) == 0x4000) { | ||||
|       uint8_t op = (instr & 0x03c0) >> 6; | ||||
|     else if((instr & 0xFC00) == 0x4000) { | ||||
|       uint8_t op = (instr & 0x03C0) >> 6; | ||||
|       uint8_t rs = (instr & 0x0038) >> 3; | ||||
|       uint8_t rd = (instr & 0x0007); | ||||
|  | ||||
| @@ -741,7 +741,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|         case 4: /* ASR */ | ||||
|           if(state->regData[rd].v & 0x80000000) { | ||||
|             state->regData[rd].v >>= state->regData[rs].v; | ||||
|             state->regData[rd].v |= 0xffffffff << (32 - state->regData[rs].v); | ||||
|             state->regData[rd].v |= 0xFFFFFFFF << (32 - state->regData[rs].v); | ||||
|           } | ||||
|           else { | ||||
|             state->regData[rd].v >>= state->regData[rs].v; | ||||
| @@ -826,7 +826,7 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  CMP Hd, Rs | ||||
|      *  MOV Hd, Hs | ||||
|      */ | ||||
|     else if((instr & 0xfc00) == 0x4400) { | ||||
|     else if((instr & 0xFC00) == 0x4400) { | ||||
|       uint8_t op  = (instr & 0x0300) >> 8; | ||||
|       bool    h1  = (instr & 0x0080) ? true: false; | ||||
|       bool    h2  = (instr & 0x0040) ? true: false; | ||||
| @@ -894,9 +894,9 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|     /* Format 9: PC-relative load | ||||
|      *  LDR Rd,[PC, #imm] | ||||
|      */ | ||||
|     else if((instr & 0xf800) == 0x4800) { | ||||
|     else if((instr & 0xF800) == 0x4800) { | ||||
|       uint8_t  rd    = (instr & 0x0700) >> 8; | ||||
|       uint8_t  word8 = (instr & 0x00ff); | ||||
|       uint8_t  word8 = (instr & 0x00FF); | ||||
|       uint32_t address; | ||||
|  | ||||
|       /* Compute load address, adding a word to account for prefetch */ | ||||
| @@ -912,8 +912,8 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  ADD sp,#+imm | ||||
|      *  ADD sp,#-imm | ||||
|      */ | ||||
|     else if((instr & 0xff00) == 0xB000) { | ||||
|       uint8_t value = (instr & 0x7f) * 4; | ||||
|     else if((instr & 0xFF00) == 0xB000) { | ||||
|       uint8_t value = (instr & 0x7F) * 4; | ||||
|  | ||||
|       /* Check the negative bit */ | ||||
|       if((instr & 0x80) != 0) { | ||||
| @@ -931,10 +931,10 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      *  POP {Rlist} | ||||
|      *  POP {Rlist, PC} | ||||
|      */ | ||||
|     else if((instr & 0xf600) == 0xb400) { | ||||
|     else if((instr & 0xF600) == 0xB400) { | ||||
|       bool    L     = (instr & 0x0800) ? true : false; | ||||
|       bool    R     = (instr & 0x0100) ? true : false; | ||||
|       uint8_t rList = (instr & 0x00ff); | ||||
|       uint8_t rList = (instr & 0x00FF); | ||||
|  | ||||
|       if(L) { | ||||
|         uint8_t r; | ||||
| @@ -1038,9 +1038,9 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|      * Conditional branches | ||||
|      * Bcond | ||||
|      */ | ||||
|     else if((instr & 0xf000) == 0xd000) { | ||||
|       int32_t branchValue = (instr & 0xff); | ||||
|       if (branchValue & 0x80) branchValue |= 0xffffff00; | ||||
|     else if((instr & 0xF000) == 0xD000) { | ||||
|       int32_t branchValue = (instr & 0xFF); | ||||
|       if (branchValue & 0x80) branchValue |= 0xFFFFFF00; | ||||
|  | ||||
|       /* Branch distance is twice that specified in the instruction. */ | ||||
|       branchValue *= 2; | ||||
| @@ -1067,9 +1067,9 @@ UnwResult UnwStartThumb(UnwState * const state) { | ||||
|     /* Format 18: unconditional branch | ||||
|      *  B label | ||||
|      */ | ||||
|     else if((instr & 0xf800) == 0xe000) { | ||||
|     else if((instr & 0xF800) == 0xE000) { | ||||
|       uint32_t v; | ||||
|       int32_t branchValue = signExtend11(instr & 0x07ff); | ||||
|       int32_t branchValue = signExtend11(instr & 0x07FF); | ||||
|  | ||||
|       /* Branch distance is twice that specified in the instruction. */ | ||||
|       branchValue *= 2; | ||||
|   | ||||
| @@ -29,7 +29,7 @@ void __aeabi_unwind_cpp_pr2(void) {}; | ||||
|  | ||||
| static inline __attribute__((always_inline)) uint32_t prel31_to_addr(const uint32_t *prel31) { | ||||
|   uint32_t offset = (((uint32_t)(*prel31)) << 1) >> 1; | ||||
|   return ((uint32_t)prel31 + offset) & 0x7fffffff; | ||||
|   return ((uint32_t)prel31 + offset) & 0x7FFFFFFF; | ||||
| } | ||||
|  | ||||
| static const UnwTabEntry *UnwTabSearchIndex(const UnwTabEntry *start, const UnwTabEntry *end, uint32_t ip) { | ||||
| @@ -54,8 +54,8 @@ static const char *UnwTabGetFunctionName(const UnwindCallbacks *cb, uint32_t add | ||||
|   if (!cb->readW(address-4,&flag_word)) | ||||
|     return NULL; | ||||
|  | ||||
|   if ((flag_word & 0xff000000) == 0xff000000) { | ||||
|     return (const char *)(address - 4 - (flag_word & 0x00ffffff)); | ||||
|   if ((flag_word & 0xFF000000) == 0xFF000000) { | ||||
|     return (const char *)(address - 4 - (flag_word & 0x00FFFFFF)); | ||||
|   } | ||||
|   return NULL; | ||||
| } | ||||
| @@ -77,7 +77,7 @@ static int UnwTabGetNextInstruction(const UnwindCallbacks *cb, UnwTabState *ucb) | ||||
|   uint32_t v = 0; | ||||
|   if (!cb->readW(ucb->current, &v)) | ||||
|     return -1; | ||||
|   instruction = (v >> (ucb->byte << 3)) & 0xff; | ||||
|   instruction = (v >> (ucb->byte << 3)) & 0xFF; | ||||
|  | ||||
|   /* Move the next byte */ | ||||
|   --ucb->byte; | ||||
| @@ -104,12 +104,12 @@ static UnwResult UnwTabStateInit(const UnwindCallbacks *cb, UnwTabState *ucb, ui | ||||
|   if (!cb->readW(instructions, &v)) | ||||
|     return UNWIND_DREAD_W_FAIL; | ||||
|  | ||||
|   if ((v & 0xff000000) == 0x80000000) { | ||||
|   if ((v & 0xFF000000) == 0x80000000) { | ||||
|     ucb->remaining = 3; | ||||
|     ucb->byte = 2; | ||||
|   /* Is a long unwind description */ | ||||
|   } else if ((v & 0xff000000) == 0x81000000) { | ||||
|     ucb->remaining = ((v & 0x00ff0000) >> 14) + 2; | ||||
|   } else if ((v & 0xFF000000) == 0x81000000) { | ||||
|     ucb->remaining = ((v & 0x00FF0000) >> 14) + 2; | ||||
|     ucb->byte = 1; | ||||
|   } else | ||||
|     return UNWIND_UNSUPPORTED_DWARF_PERSONALITY; | ||||
| @@ -138,15 +138,15 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|   /* Consume all instruction byte */ | ||||
|   while ((instruction = UnwTabGetNextInstruction(cb, ucb)) != -1) { | ||||
|  | ||||
|     if ((instruction & 0xc0) == 0x00) { // ARM_EXIDX_CMD_DATA_POP | ||||
|     if ((instruction & 0xC0) == 0x00) { // ARM_EXIDX_CMD_DATA_POP | ||||
|       /* vsp = vsp + (xxxxxx << 2) + 4 */ | ||||
|       ucb->vrs[13] += ((instruction & 0x3f) << 2) + 4; | ||||
|       ucb->vrs[13] += ((instruction & 0x3F) << 2) + 4; | ||||
|     } else | ||||
|     if ((instruction & 0xc0) == 0x40) { // ARM_EXIDX_CMD_DATA_PUSH | ||||
|     if ((instruction & 0xC0) == 0x40) { // ARM_EXIDX_CMD_DATA_PUSH | ||||
|       /* vsp = vsp - (xxxxxx << 2) - 4 */ | ||||
|       ucb->vrs[13] -= ((instruction & 0x3f) << 2) - 4; | ||||
|       ucb->vrs[13] -= ((instruction & 0x3F) << 2) - 4; | ||||
|     } else | ||||
|     if ((instruction & 0xf0) == 0x80) { | ||||
|     if ((instruction & 0xF0) == 0x80) { | ||||
|       /* pop under mask {r15-r12},{r11-r4} or refuse to unwind */ | ||||
|       instruction = instruction << 8 | UnwTabGetNextInstruction(cb, ucb); | ||||
|  | ||||
| @@ -156,7 +156,7 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|  | ||||
|       /* Pop registers using mask */    // ARM_EXIDX_CMD_REG_POP | ||||
|       vsp = ucb->vrs[13]; | ||||
|       mask = instruction & 0xfff; | ||||
|       mask = instruction & 0xFFF; | ||||
|  | ||||
|       reg = 4; | ||||
|       while (mask) { | ||||
| @@ -176,13 +176,13 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|         ucb->vrs[13] = vsp; | ||||
|  | ||||
|     } else | ||||
|     if ((instruction & 0xf0) == 0x90 && // ARM_EXIDX_CMD_REG_TO_SP | ||||
|         instruction != 0x9d && | ||||
|         instruction != 0x9f) { | ||||
|     if ((instruction & 0xF0) == 0x90 && // ARM_EXIDX_CMD_REG_TO_SP | ||||
|         instruction != 0x9D && | ||||
|         instruction != 0x9F) { | ||||
|       /* vsp = r[nnnn] */ | ||||
|       ucb->vrs[13] = ucb->vrs[instruction & 0x0f]; | ||||
|       ucb->vrs[13] = ucb->vrs[instruction & 0x0F]; | ||||
|     } else | ||||
|     if ((instruction & 0xf0) == 0xa0) { // ARM_EXIDX_CMD_REG_POP | ||||
|     if ((instruction & 0xF0) == 0xA0) { // ARM_EXIDX_CMD_REG_POP | ||||
|       /* pop r4-r[4+nnn] or pop r4-r[4+nnn], r14*/ | ||||
|       vsp = ucb->vrs[13]; | ||||
|  | ||||
| @@ -206,7 +206,7 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|       ucb->vrs[13] = vsp; | ||||
|  | ||||
|     } else | ||||
|     if (instruction == 0xb0) { // ARM_EXIDX_CMD_FINISH | ||||
|     if (instruction == 0xB0) { // ARM_EXIDX_CMD_FINISH | ||||
|       /* finished */ | ||||
|       if (ucb->vrs[15] == 0) | ||||
|         ucb->vrs[15] = ucb->vrs[14]; | ||||
| @@ -215,7 +215,7 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|       return UNWIND_SUCCESS; | ||||
|  | ||||
|     } else | ||||
|     if (instruction == 0xb1) { // ARM_EXIDX_CMD_REG_POP | ||||
|     if (instruction == 0xB1) { // ARM_EXIDX_CMD_REG_POP | ||||
|       /* pop register under mask {r3,r2,r1,r0} */ | ||||
|       vsp = ucb->vrs[13]; | ||||
|       mask = UnwTabGetNextInstruction(cb, ucb); | ||||
| @@ -236,14 +236,14 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|       ucb->vrs[13] = (uint32_t)vsp; | ||||
|  | ||||
|     } else | ||||
|     if (instruction == 0xb2) { // ARM_EXIDX_CMD_DATA_POP | ||||
|     if (instruction == 0xB2) { // ARM_EXIDX_CMD_DATA_POP | ||||
|       /* vps = vsp + 0x204 + (uleb128 << 2) */ | ||||
|       ucb->vrs[13] += 0x204 + (UnwTabGetNextInstruction(cb, ucb) << 2); | ||||
|  | ||||
|     } else | ||||
|     if (instruction == 0xb3 || // ARM_EXIDX_CMD_VFP_POP | ||||
|       instruction == 0xc8 || | ||||
|       instruction == 0xc9) { | ||||
|     if (instruction == 0xB3 || // ARM_EXIDX_CMD_VFP_POP | ||||
|       instruction == 0xC8 || | ||||
|       instruction == 0xC9) { | ||||
|  | ||||
|       /* pop VFP double-precision registers */ | ||||
|       vsp = ucb->vrs[13]; | ||||
| @@ -256,12 +256,12 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|       ucb->vrs[14] = v; | ||||
|       vsp += 4; | ||||
|  | ||||
|       if (instruction == 0xc8) { | ||||
|       if (instruction == 0xC8) { | ||||
|         /* D[16+sssss]-D[16+ssss+cccc] */ | ||||
|         ucb->vrs[14] |= 1 << 16; | ||||
|       } | ||||
|  | ||||
|       if (instruction != 0xb3) { | ||||
|       if (instruction != 0xB3) { | ||||
|         /* D[sssss]-D[ssss+cccc] */ | ||||
|         ucb->vrs[14] |= 1 << 17; | ||||
|       } | ||||
| @@ -269,13 +269,13 @@ static UnwResult UnwTabExecuteInstructions(const UnwindCallbacks *cb, UnwTabStat | ||||
|       ucb->vrs[13] = vsp; | ||||
|  | ||||
|     } else | ||||
|     if ((instruction & 0xf8) == 0xb8 || | ||||
|         (instruction & 0xf8) == 0xd0) { | ||||
|     if ((instruction & 0xF8) == 0xB8 || | ||||
|         (instruction & 0xF8) == 0xD0) { | ||||
|  | ||||
|       /* Pop VFP double precision registers D[8]-D[8+nnn] */ | ||||
|       ucb->vrs[14] = 0x80 | (instruction & 0x07); | ||||
|  | ||||
|       if ((instruction & 0xf8) == 0xd0) { | ||||
|       if ((instruction & 0xF8) == 0xD0) { | ||||
|         ucb->vrs[14] = 1 << 17; | ||||
|       } | ||||
|  | ||||
| @@ -337,7 +337,7 @@ static UnwResult UnwTabUnwindFrame(const UnwindCallbacks *cb, UnwindFrame *frame | ||||
|  | ||||
|   /* Check for exception return */ | ||||
|   /* TODO Test with other ARM processors to verify this method. */ | ||||
|   if ((ucb.vrs[15] & 0xf0000000) == 0xf0000000) { | ||||
|   if ((ucb.vrs[15] & 0xF0000000) == 0xF0000000) { | ||||
|     /* According to the Cortex Programming Manual (p.44), the stack address is always 8-byte aligned (Cortex-M7). | ||||
|        Depending on where the exception came from (MSP or PSP), we need the right SP value to work with. | ||||
|  | ||||
| @@ -354,20 +354,20 @@ static UnwResult UnwTabUnwindFrame(const UnwindCallbacks *cb, UnwindFrame *frame | ||||
|        If we need to start from the PSP, we need to go up exactly 6 words to find the PC. | ||||
|        See the ARMv7-M Architecture Reference Manual p.594 and Cortex-M7 Processor Programming Manual p.44/p.45 for details. | ||||
|     */ | ||||
|     if ((ucb.vrs[15] & 0xc) == 0) { | ||||
|       /* Return to Handler Mode: MSP (0xffffff-1) */ | ||||
|     if ((ucb.vrs[15] & 0xC) == 0) { | ||||
|       /* Return to Handler Mode: MSP (0xFFFFFF-1) */ | ||||
|       stack = ucb.vrs[13]; | ||||
|  | ||||
|       /* The PC is always 2 words down from the MSP, if it was a non-floating-point exception */ | ||||
|       stack -= 2*4; | ||||
|  | ||||
|       /* If there was a VFP exception (0xffffffe1), the PC is located another 18 words down */ | ||||
|       if ((ucb.vrs[15] & 0xf0) == 0xe0) { | ||||
|       /* If there was a VFP exception (0xFFFFFFE1), the PC is located another 18 words down */ | ||||
|       if ((ucb.vrs[15] & 0xF0) == 0xE0) { | ||||
|         stack -= 18*4; | ||||
|       } | ||||
|     } | ||||
|     else { | ||||
|       /* Return to Thread Mode: PSP (0xffffff-d) */ | ||||
|       /* Return to Thread Mode: PSP (0xFFFFFF-d) */ | ||||
|       stack = read_psp(); | ||||
|  | ||||
|       /* The PC is always 6 words up from the PSP */ | ||||
| @@ -423,7 +423,7 @@ UnwResult UnwindByTableStart(UnwindFrame* frame, const UnwindCallbacks *cb, void | ||||
|     const UnwTabEntry *index = UnwTabSearchIndex(__exidx_start, __exidx_end, frame->pc); | ||||
|  | ||||
|     /* Clear last bit (Thumb indicator) */ | ||||
|     frame->pc &= 0xfffffffeU; | ||||
|     frame->pc &= 0xFFFFFFFEU; | ||||
|  | ||||
|     /* Generate the backtrace information */ | ||||
|     entry.address = frame->pc; | ||||
|   | ||||
| @@ -91,9 +91,9 @@ bool UnwMemHashWrite(MemData * const memData, uint32_t addr, uint32_t val, bool | ||||
|       M_SetIdxUsed(memData->tracked, i); | ||||
|     } | ||||
|     else { | ||||
| #if defined(UNW_DEBUG) | ||||
|       memData->v[i] = 0xdeadbeef; | ||||
| #endif | ||||
|       #if defined(UNW_DEBUG) | ||||
|         memData->v[i] = 0xDEADBEEF; | ||||
|       #endif | ||||
|       M_ClrIdxUsed(memData->tracked, i); | ||||
|     } | ||||
|  | ||||
|   | ||||
| @@ -123,13 +123,13 @@ uint8_t u8g_dev_sh1106_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t m | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|         u8g_SetAddress(u8g, dev, 0);           // instruction mode | ||||
|         u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_sh1106_128x64_data_start_2_wire); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2)); // select current page | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (pb->p.page*2)); // select current page | ||||
|         u8g_SetAddress(u8g, dev, 1);           // data mode | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *) pb->buf); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|         u8g_SetAddress(u8g, dev, 0);           // instruction mode | ||||
|         u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_sh1106_128x64_data_start_2_wire); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2+1)); // select current page | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (pb->p.page*2+1)); // select current page | ||||
|         u8g_SetAddress(u8g, dev, 1);           // data mode | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
| @@ -191,13 +191,13 @@ uint8_t u8g_dev_ssd1306_128x64_2x_2_wire_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|         u8g_SetAddress(u8g, dev, 0);           // instruction mode | ||||
|         u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_ssd1306_128x64_data_start_2_wire); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2)); // select current page | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (pb->p.page*2)); // select current page | ||||
|         u8g_SetAddress(u8g, dev, 1);           // data mode | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *) pb->buf); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|         u8g_SetAddress(u8g, dev, 0);           // instruction mode | ||||
|         u8g_WriteEscSeqP_2_wire(u8g, dev, u8g_dev_ssd1306_128x64_data_start_2_wire); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2+1)); // select current page | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (pb->p.page*2+1)); // select current page | ||||
|         u8g_SetAddress(u8g, dev, 1);           // data mode | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
| @@ -250,25 +250,25 @@ uint8_t u8g_WriteEscSeqP_2_wire(u8g_t *u8g, u8g_dev_t *dev, const uint8_t *esc_s | ||||
|       else if (value == 254) { | ||||
|         break; | ||||
|       } | ||||
|       else if (value >= 0x0f0) { | ||||
|       else if (value >= 0x0F0) { | ||||
|         /* not yet used, do nothing */ | ||||
|       } | ||||
|       else if (value >= 0xe0 ) { | ||||
|         u8g_SetAddress(u8g, dev, value & 0x0f); | ||||
|       else if (value >= 0xE0 ) { | ||||
|         u8g_SetAddress(u8g, dev, value & 0x0F); | ||||
|       } | ||||
|       else if (value >= 0xd0) { | ||||
|         u8g_SetChipSelect(u8g, dev, value & 0x0f); | ||||
|       else if (value >= 0xD0) { | ||||
|         u8g_SetChipSelect(u8g, dev, value & 0x0F); | ||||
|       } | ||||
|       else if (value >= 0xc0) { | ||||
|       else if (value >= 0xC0) { | ||||
|         u8g_SetResetLow(u8g, dev); | ||||
|         value &= 0x0f; | ||||
|         value &= 0x0F; | ||||
|         value <<= 4; | ||||
|         value+=2; | ||||
|         u8g_Delay(value); | ||||
|         u8g_SetResetHigh(u8g, dev); | ||||
|         u8g_Delay(value); | ||||
|       } | ||||
|       else if (value >= 0xbe) {                       /* not yet implemented */ | ||||
|       else if (value >= 0xBE) {                       /* not yet implemented */ | ||||
|         /* u8g_SetVCC(u8g, dev, value & 0x01); */ | ||||
|       } | ||||
|       else if (value <= 127) { | ||||
|   | ||||
| @@ -72,10 +72,10 @@ static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = { | ||||
|     U8G_ESC_CS(1),      // enable chip | ||||
|     U8G_ESC_RST(15),    // do reset low pulse with (15*16)+2 milliseconds (=maximum delay)*/ | ||||
|  | ||||
|     0x0A2,              // 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet) | ||||
|     0x0A2,              // 0x0A2: LCD bias 1/9 (according to Displaytech 64128N datasheet) | ||||
|     0x0A0,              // Normal ADC Select (according to Displaytech 64128N datasheet) | ||||
|  | ||||
|     0x0c8,              // common output mode: set scan direction normal operation/SHL Select, 0x0c0 --> SHL = 0, normal, 0x0c8 --> SHL = 1 | ||||
|     0x0C8,              // common output mode: set scan direction normal operation/SHL Select, 0x0C0 --> SHL = 0, normal, 0x0C8 --> SHL = 1 | ||||
|     0x040,              // Display start line for Displaytech 64128N | ||||
|  | ||||
|     0x028 | 0x04,       // power control: turn on voltage converter | ||||
| @@ -89,19 +89,19 @@ static const uint8_t u8g_dev_st7565_64128n_HAL_init_seq[] PROGMEM = { | ||||
|  | ||||
|     0x010,              // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N | ||||
|  | ||||
|     0x0a6,              // display normal, bit val 0: LCD pixel off. | ||||
|     0x0A6,              // display normal, bit val 0: LCD pixel off. | ||||
|  | ||||
|     0x081,              // set contrast | ||||
|     0x01e,              // Contrast value. Setting for controlling brightness of Displaytech 64128N | ||||
|     0x01E,              // Contrast value. Setting for controlling brightness of Displaytech 64128N | ||||
|  | ||||
|  | ||||
|     0x0af,              // display on | ||||
|     0x0AF,              // display on | ||||
|  | ||||
|     U8G_ESC_DLY(100),   // delay 100 ms | ||||
|     0x0a5,              // display all points, ST7565 | ||||
|     0x0A5,              // display all points, ST7565 | ||||
|     U8G_ESC_DLY(100),   // delay 100 ms | ||||
|     U8G_ESC_DLY(100),   // delay 100 ms | ||||
|     0x0a4,              // normal display | ||||
|     0x0A4,              // normal display | ||||
|     U8G_ESC_CS(0),      // disable chip | ||||
|     U8G_ESC_END         // end of sequence | ||||
| }; | ||||
| @@ -117,10 +117,10 @@ static const uint8_t u8g_dev_st7565_64128n_HAL_data_start[] PROGMEM = { | ||||
| static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = { | ||||
|   U8G_ESC_ADR(0),       // instruction mode | ||||
|   U8G_ESC_CS(1),        // enable chip | ||||
|   0x0ac,                // static indicator off | ||||
|   0x0AC,                // static indicator off | ||||
|   0x000,                // indicator register set (not sure if this is required) | ||||
|   0x0ae,                // display off | ||||
|   0x0a5,                // all points on | ||||
|   0x0AE,                // display off | ||||
|   0x0A5,                // all points on | ||||
|   U8G_ESC_CS(0),        // disable chip, bugfix 12 nov 2014 | ||||
|   U8G_ESC_END           // end of sequence | ||||
|   }; | ||||
| @@ -128,8 +128,8 @@ static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_on[] PROGMEM = { | ||||
| static const uint8_t u8g_dev_st7565_64128n_HAL_sleep_off[] PROGMEM = { | ||||
|   U8G_ESC_ADR(0),       // instruction mode | ||||
|   U8G_ESC_CS(1),        // enable chip | ||||
|   0x0a4,                // all points off | ||||
|   0x0af,                // display on | ||||
|   0x0A4,                // all points off | ||||
|   0x0AF,                // display on | ||||
|   U8G_ESC_DLY(50),      // delay 50 ms | ||||
|   U8G_ESC_CS(0),        // disable chip, bugfix 12 nov 2014 | ||||
|   U8G_ESC_END           // end of sequence | ||||
| @@ -146,7 +146,7 @@ uint8_t u8g_dev_st7565_64128n_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo | ||||
|     case U8G_DEV_MSG_PAGE_NEXT: { | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | pb->p.page); /* select current page (ST7565R) */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 ) | ||||
|           return 0; | ||||
| @@ -182,13 +182,13 @@ uint8_t u8g_dev_st7565_64128n_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|  | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page)); /* select current page (ST7565R) */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|  | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_64128n_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page+1)); /* select current page (ST7565R) */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|         u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|   | ||||
| @@ -75,7 +75,7 @@ static const uint8_t u8g_dev_st7920_128x64_HAL_init_seq[] PROGMEM = { | ||||
|   U8G_ESC_DLY(50),    // delay 50 ms | ||||
|  | ||||
|   0x038,              // 8 Bit interface (DL=1), basic instruction set (RE=0) | ||||
|   0x00c,              // display on, cursor & blink off; 0x08: all off | ||||
|   0x00C,              // display on, cursor & blink off; 0x08: all off | ||||
|   0x006,              // Entry mode: Cursor move to right ,DDRAM address counter (AC) plus 1, no shift | ||||
|   0x002,              // disable scroll, enable CGRAM adress | ||||
|   0x001,              // clear RAM, needs 1.6 ms | ||||
| @@ -125,7 +125,7 @@ uint8_t u8g_dev_st7920_128x64_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo | ||||
|       ptr = (uint8_t *)pb->buf; | ||||
|       for (i = 0; i < 8; i ++) { | ||||
|         u8g_SetAddress(u8g, dev, 0);           /* cmd mode */ | ||||
|         u8g_WriteByte(u8g, dev, 0x03e );      /* enable extended mode */ | ||||
|         u8g_WriteByte(u8g, dev, 0x03E );      /* enable extended mode */ | ||||
|  | ||||
|         if (y < 32) { | ||||
|           u8g_WriteByte(u8g, dev, 0x080 | y );      /* y pos  */ | ||||
| @@ -170,7 +170,7 @@ uint8_t u8g_dev_st7920_128x64_HAL_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, | ||||
|       ptr = (uint8_t *)pb->buf; | ||||
|       for (i = 0; i < 32; i ++) { | ||||
|         u8g_SetAddress(u8g, dev, 0);           /* cmd mode */ | ||||
|         u8g_WriteByte(u8g, dev, 0x03e );      /* enable extended mode */ | ||||
|         u8g_WriteByte(u8g, dev, 0x03E );      /* enable extended mode */ | ||||
|  | ||||
|         if (y < 32) { | ||||
|           u8g_WriteByte(u8g, dev, 0x080 | y );      /* y pos  */ | ||||
|   | ||||
| @@ -75,27 +75,27 @@ static const uint8_t u8g_dev_uc1701_mini12864_HAL_init_seq[] PROGMEM = { | ||||
|   U8G_ESC_RST(1),           /* do reset low pulse with (1*16)+2 milliseconds */ | ||||
|   U8G_ESC_CS(1),             /* enable chip */ | ||||
|  | ||||
|   0x0e2,            /* soft reset */ | ||||
|   0x0E2,            /* soft reset */ | ||||
|   0x040,    /* set display start line to 0 */ | ||||
|   0x0a0,    /* ADC set to reverse */ | ||||
|   0x0c8,    /* common output mode */ | ||||
|   0x0a6,    /* display normal, bit val 0: LCD pixel off. */ | ||||
|   0x0a2,    /* LCD bias 1/9 */ | ||||
|   0x02f,    /* all power  control circuits on */ | ||||
|   0x0f8,    /* set booster ratio to */ | ||||
|   0x0A0,    /* ADC set to reverse */ | ||||
|   0x0C8,    /* common output mode */ | ||||
|   0x0A6,    /* display normal, bit val 0: LCD pixel off. */ | ||||
|   0x0A2,    /* LCD bias 1/9 */ | ||||
|   0x02F,    /* all power  control circuits on */ | ||||
|   0x0F8,    /* set booster ratio to */ | ||||
|   0x000,    /* 4x */ | ||||
|   0x023,    /* set V0 voltage resistor ratio to large */ | ||||
|   0x081,    /* set contrast */ | ||||
|   0x027,    /* contrast value */ | ||||
|   0x0ac,    /* indicator */ | ||||
|   0x0AC,    /* indicator */ | ||||
|   0x000,    /* disable */ | ||||
|   0x0af,    /* display on */ | ||||
|   0x0AF,    /* display on */ | ||||
|  | ||||
|   U8G_ESC_DLY(100),       /* delay 100 ms */ | ||||
|   0x0a5,                    /* display all points, ST7565 */ | ||||
|   0x0A5,                    /* display all points, ST7565 */ | ||||
|   U8G_ESC_DLY(100),       /* delay 100 ms */ | ||||
|   U8G_ESC_DLY(100),       /* delay 100 ms */ | ||||
|   0x0a4,                    /* normal display */ | ||||
|   0x0A4,                    /* normal display */ | ||||
|   U8G_ESC_CS(0),             /* disable chip */ | ||||
|   U8G_ESC_END                /* end of sequence */ | ||||
| }; | ||||
| @@ -122,7 +122,7 @@ uint8_t u8g_dev_uc1701_mini12864_HAL_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, | ||||
|       { | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | pb->p.page); /* select current page */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|         if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 ) | ||||
|           return 0; | ||||
| @@ -155,13 +155,13 @@ uint8_t u8g_dev_uc1701_mini12864_HAL_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t m | ||||
|         u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); | ||||
|  | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page)); /* select current page */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|   u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)pb->buf); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|  | ||||
|         u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1701_mini12864_HAL_data_start); | ||||
|         u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page */ | ||||
|         u8g_WriteByte(u8g, dev, 0x0B0 | (2*pb->p.page+1)); /* select current page */ | ||||
|         u8g_SetAddress(u8g, dev, 1);           /* data mode */ | ||||
|   u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); | ||||
|         u8g_SetChipSelect(u8g, dev, 0); | ||||
|   | ||||
| @@ -322,19 +322,19 @@ void Planner::init() { | ||||
|     //  // Get most significant bit set on divider | ||||
|     //  uint8_t idx = 0; | ||||
|     //  uint32_t nr = d; | ||||
|     //  if (!(nr & 0xff0000)) { | ||||
|     //  if (!(nr & 0xFF0000)) { | ||||
|     //    nr <<= 8; | ||||
|     //    idx += 8; | ||||
|     //    if (!(nr & 0xff0000)) { | ||||
|     //    if (!(nr & 0xFF0000)) { | ||||
|     //      nr <<= 8; | ||||
|     //      idx += 8; | ||||
|     //    } | ||||
|     //  } | ||||
|     //  if (!(nr & 0xf00000)) { | ||||
|     //  if (!(nr & 0xF00000)) { | ||||
|     //    nr <<= 4; | ||||
|     //    idx += 4; | ||||
|     //  } | ||||
|     //  if (!(nr & 0xc00000)) { | ||||
|     //  if (!(nr & 0xC00000)) { | ||||
|     //    nr <<= 2; | ||||
|     //    idx += 2; | ||||
|     //  } | ||||
|   | ||||
| @@ -365,14 +365,14 @@ class Stepper { | ||||
|         step_rate -= F_CPU / 500000; // Correct for minimal speed | ||||
|         if (step_rate >= (8 * 256)) { // higher step rate | ||||
|           unsigned short table_address = (unsigned short)&speed_lookuptable_fast[(unsigned char)(step_rate >> 8)][0]; | ||||
|           unsigned char tmp_step_rate = (step_rate & 0x00ff); | ||||
|           unsigned char tmp_step_rate = (step_rate & 0x00FF); | ||||
|           unsigned short gain = (unsigned short)pgm_read_word_near(table_address + 2); | ||||
|           MultiU16X8toH16(timer, tmp_step_rate, gain); | ||||
|           timer = (unsigned short)pgm_read_word_near(table_address) - timer; | ||||
|         } | ||||
|         else { // lower step rates | ||||
|           unsigned short table_address = (unsigned short)&speed_lookuptable_slow[0][0]; | ||||
|           table_address += ((step_rate) >> 1) & 0xfffc; | ||||
|           table_address += ((step_rate) >> 1) & 0xFFFC; | ||||
|           timer = (unsigned short)pgm_read_word_near(table_address); | ||||
|           timer -= (((unsigned short)pgm_read_word_near(table_address + 2) * (unsigned char)(step_rate & 0x0007)) >> 3); | ||||
|         } | ||||
|   | ||||
| @@ -45,22 +45,22 @@ | ||||
|  | ||||
|   #ifdef FAST_CRC | ||||
|     static const uint8_t crctab7[] PROGMEM = { | ||||
|       0x00,0x09,0x12,0x1b,0x24,0x2d,0x36,0x3f,0x48,0x41,0x5a,0x53,0x6c,0x65,0x7e,0x77, | ||||
|       0x19,0x10,0x0b,0x02,0x3d,0x34,0x2f,0x26,0x51,0x58,0x43,0x4a,0x75,0x7c,0x67,0x6e, | ||||
|       0x32,0x3b,0x20,0x29,0x16,0x1f,0x04,0x0d,0x7a,0x73,0x68,0x61,0x5e,0x57,0x4c,0x45, | ||||
|       0x2b,0x22,0x39,0x30,0x0f,0x06,0x1d,0x14,0x63,0x6a,0x71,0x78,0x47,0x4e,0x55,0x5c, | ||||
|       0x64,0x6d,0x76,0x7f,0x40,0x49,0x52,0x5b,0x2c,0x25,0x3e,0x37,0x08,0x01,0x1a,0x13, | ||||
|       0x7d,0x74,0x6f,0x66,0x59,0x50,0x4b,0x42,0x35,0x3c,0x27,0x2e,0x11,0x18,0x03,0x0a, | ||||
|       0x56,0x5f,0x44,0x4d,0x72,0x7b,0x60,0x69,0x1e,0x17,0x0c,0x05,0x3a,0x33,0x28,0x21, | ||||
|       0x4f,0x46,0x5d,0x54,0x6b,0x62,0x79,0x70,0x07,0x0e,0x15,0x1c,0x23,0x2a,0x31,0x38, | ||||
|       0x41,0x48,0x53,0x5a,0x65,0x6c,0x77,0x7e,0x09,0x00,0x1b,0x12,0x2d,0x24,0x3f,0x36, | ||||
|       0x58,0x51,0x4a,0x43,0x7c,0x75,0x6e,0x67,0x10,0x19,0x02,0x0b,0x34,0x3d,0x26,0x2f, | ||||
|       0x73,0x7a,0x61,0x68,0x57,0x5e,0x45,0x4c,0x3b,0x32,0x29,0x20,0x1f,0x16,0x0d,0x04, | ||||
|       0x6a,0x63,0x78,0x71,0x4e,0x47,0x5c,0x55,0x22,0x2b,0x30,0x39,0x06,0x0f,0x14,0x1d, | ||||
|       0x25,0x2c,0x37,0x3e,0x01,0x08,0x13,0x1a,0x6d,0x64,0x7f,0x76,0x49,0x40,0x5b,0x52, | ||||
|       0x3c,0x35,0x2e,0x27,0x18,0x11,0x0a,0x03,0x74,0x7d,0x66,0x6f,0x50,0x59,0x42,0x4b, | ||||
|       0x17,0x1e,0x05,0x0c,0x33,0x3a,0x21,0x28,0x5f,0x56,0x4d,0x44,0x7b,0x72,0x69,0x60, | ||||
|       0x0e,0x07,0x1c,0x15,0x2a,0x23,0x38,0x31,0x46,0x4f,0x54,0x5d,0x62,0x6b,0x70,0x79 | ||||
|       0x00,0x09,0x12,0x1B,0x24,0x2D,0x36,0x3F,0x48,0x41,0x5A,0x53,0x6C,0x65,0x7E,0x77, | ||||
|       0x19,0x10,0x0B,0x02,0x3D,0x34,0x2F,0x26,0x51,0x58,0x43,0x4A,0x75,0x7C,0x67,0x6E, | ||||
|       0x32,0x3B,0x20,0x29,0x16,0x1F,0x04,0x0D,0x7A,0x73,0x68,0x61,0x5E,0x57,0x4C,0x45, | ||||
|       0x2B,0x22,0x39,0x30,0x0F,0x06,0x1D,0x14,0x63,0x6A,0x71,0x78,0x47,0x4E,0x55,0x5C, | ||||
|       0x64,0x6D,0x76,0x7F,0x40,0x49,0x52,0x5B,0x2C,0x25,0x3E,0x37,0x08,0x01,0x1A,0x13, | ||||
|       0x7D,0x74,0x6F,0x66,0x59,0x50,0x4B,0x42,0x35,0x3C,0x27,0x2E,0x11,0x18,0x03,0x0A, | ||||
|       0x56,0x5F,0x44,0x4D,0x72,0x7B,0x60,0x69,0x1E,0x17,0x0C,0x05,0x3A,0x33,0x28,0x21, | ||||
|       0x4F,0x46,0x5D,0x54,0x6B,0x62,0x79,0x70,0x07,0x0E,0x15,0x1C,0x23,0x2A,0x31,0x38, | ||||
|       0x41,0x48,0x53,0x5A,0x65,0x6C,0x77,0x7E,0x09,0x00,0x1B,0x12,0x2D,0x24,0x3F,0x36, | ||||
|       0x58,0x51,0x4A,0x43,0x7C,0x75,0x6E,0x67,0x10,0x19,0x02,0x0B,0x34,0x3D,0x26,0x2F, | ||||
|       0x73,0x7A,0x61,0x68,0x57,0x5E,0x45,0x4C,0x3B,0x32,0x29,0x20,0x1F,0x16,0x0D,0x04, | ||||
|       0x6A,0x63,0x78,0x71,0x4E,0x47,0x5C,0x55,0x22,0x2B,0x30,0x39,0x06,0x0F,0x14,0x1D, | ||||
|       0x25,0x2C,0x37,0x3E,0x01,0x08,0x13,0x1A,0x6D,0x64,0x7F,0x76,0x49,0x40,0x5B,0x52, | ||||
|       0x3C,0x35,0x2E,0x27,0x18,0x11,0x0A,0x03,0x74,0x7D,0x66,0x6F,0x50,0x59,0x42,0x4B, | ||||
|       0x17,0x1E,0x05,0x0C,0x33,0x3A,0x21,0x28,0x5F,0x56,0x4D,0x44,0x7B,0x72,0x69,0x60, | ||||
|       0x0E,0x07,0x1C,0x15,0x2A,0x23,0x38,0x31,0x46,0x4F,0x54,0x5D,0x62,0x6B,0x70,0x79 | ||||
|     }; | ||||
|  | ||||
|     static uint8_t CRC7(const uint8_t* data, uint8_t n) { | ||||
| @@ -79,9 +79,9 @@ | ||||
|         d ^= crc << 1; | ||||
|         if (d & 0x80) d ^= 9; | ||||
|         crc = d ^ (crc & 0x78) ^ (crc << 4) ^ ((crc >> 3) & 15); | ||||
|         crc &= 0x7f; | ||||
|         crc &= 0x7F; | ||||
|       } | ||||
|       crc = (crc << 1) ^ (crc << 4) ^ (crc & 0x70) ^ ((crc >> 3) & 0x0f); | ||||
|       crc = (crc << 1) ^ (crc << 4) ^ (crc & 0x70) ^ ((crc >> 3) & 0x0F); | ||||
|       return crc | 1; | ||||
|     } | ||||
|   #endif | ||||
| @@ -438,9 +438,9 @@ bool Sd2Card::readData(uint8_t* dst) { | ||||
|       for (size_t i = 0; i < n; i++) { | ||||
|         crc = (uint8_t)(crc >> 8) | (crc << 8); | ||||
|         crc ^= data[i]; | ||||
|         crc ^= (uint8_t)(crc & 0xff) >> 4; | ||||
|         crc ^= (uint8_t)(crc & 0xFF) >> 4; | ||||
|         crc ^= crc << 12; | ||||
|         crc ^= (crc & 0xff) << 5; | ||||
|         crc ^= (crc & 0xFF) << 5; | ||||
|       } | ||||
|       return crc; | ||||
|     } | ||||
|   | ||||
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