Standardize some hexadecimals

This commit is contained in:
Scott Lahteine
2018-05-08 09:17:44 -05:00
parent ec05408453
commit d1b619be52
27 changed files with 204 additions and 204 deletions

View File

@ -839,7 +839,7 @@
REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0);
// Disable PIO on A26 and A27
REG_PIOA_PDR = 0x0c000000;
REG_PIOA_PDR = 0x0C000000;
OUT_WRITE(SDSS, 1);
// Reset SPI0 (from sam lib)

View File

@ -122,16 +122,16 @@ static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
if ( rs == 0 )
/* command */
spiSend_sw_DUE(0x0f8);
spiSend_sw_DUE(0x0F8);
else
/* data */
spiSend_sw_DUE(0x0fa);
spiSend_sw_DUE(0x0FA);
for (i = 0; i < 4; i++) // give the controller some time to process the data
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
}
spiSend_sw_DUE(val & 0x0f0);
spiSend_sw_DUE(val & 0x0F0);
spiSend_sw_DUE(val << 4);
}

View File

@ -74,7 +74,7 @@ extern "C" {
#define PLL_UPLL_HZ 480000000
#define PLL_COUNT 0x3fU
#define PLL_COUNT 0x3FU
enum pll_source {
PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator.

View File

@ -96,13 +96,13 @@ struct scsi_inquiry_data {
#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
#define SCSI_INQ_DT_ARRAY 0x0c //!< Storage Array Controller
#define SCSI_INQ_DT_ENCLOSURE 0x0d //!< Enclosure Services
#define SCSI_INQ_DT_RBC 0x0e //!< Simplified Direct Access
#define SCSI_INQ_DT_OCRW 0x0f //!< Optical card reader/writer
#define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller
#define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services
#define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access
#define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer
#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
#define SCSI_INQ_DT_NONE 0x1f //!< No Peripheral
#define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral
uint8_t flags1; //!< Flags (byte 1)
#define SCSI_INQ_RMB 0x80 //!< Removable Medium
uint8_t version; //!< Version
@ -213,17 +213,17 @@ enum scsi_sense_key {
SCSI_SK_DATA_PROTECT = 0x7,
SCSI_SK_BLANK_CHECK = 0x8,
SCSI_SK_VENDOR_SPECIFIC = 0x9,
SCSI_SK_COPY_ABORTED = 0xa,
SCSI_SK_ABORTED_COMMAND = 0xb,
SCSI_SK_VOLUME_OVERFLOW = 0xd,
SCSI_SK_MISCOMPARE = 0xe,
SCSI_SK_COPY_ABORTED = 0xA,
SCSI_SK_ABORTED_COMMAND = 0xB,
SCSI_SK_VOLUME_OVERFLOW = 0xD,
SCSI_SK_MISCOMPARE = 0xE,
};
/* Additional Sense Code / Additional Sense Code Qualifier pairs */
enum scsi_asc_ascq {
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
SCSI_ASC_WRITE_ERROR = 0x0c00,
SCSI_ASC_WRITE_ERROR = 0x0C00,
SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
@ -242,7 +242,7 @@ enum scsi_asc_ascq {
enum scsi_spc_mode {
SCSI_MS_MODE_VENDOR_SPEC = 0x00,
SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
SCSI_MS_MODE_ALL = 0x3f,
SCSI_MS_MODE_ALL = 0x3F,
};
/**
@ -289,7 +289,7 @@ static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
{
return cdb[2] & 0x3f;
return cdb[2] & 0x3F;
}
static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)

View File

@ -527,7 +527,7 @@ static bool udc_req_std_dev_set_feature(void)
if (!udd_is_high_speed()) {
break;
}
if (udd_g_ctrlreq.req.wIndex & 0xff) {
if (udd_g_ctrlreq.req.wIndex & 0xFF) {
break;
}
// Unconfigure the device, terminating all ongoing requests
@ -618,7 +618,7 @@ static bool udc_req_std_dev_get_str_desc(void)
uint8_t str_length = 0;
// Link payload pointer to the string corresponding at request
switch (udd_g_ctrlreq.req.wValue & 0xff) {
switch (udd_g_ctrlreq.req.wValue & 0xFF) {
case 0:
udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid,
sizeof(udc_string_desc_languageid));
@ -674,7 +674,7 @@ static bool udc_req_std_dev_get_descriptor(void)
{
uint8_t conf_num;
conf_num = udd_g_ctrlreq.req.wValue & 0xff;
conf_num = udd_g_ctrlreq.req.wValue & 0xFF;
// Check descriptor ID
switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) {

View File

@ -271,7 +271,7 @@ enum usb_langid {
/**
* \brief Mask selecting the index part of an endpoint address
*/
#define USB_EP_ADDR_MASK 0x0f
#define USB_EP_ADDR_MASK 0x0F
//! \brief USB address identifier
typedef uint8_t usb_add_t;

View File

@ -225,7 +225,7 @@ bool usb_task_extra_string(void) {
uint8_t str_lgt = 0;
// Link payload pointer to the string corresponding at request
switch (udd_g_ctrlreq.req.wValue & 0xff) {
switch (udd_g_ctrlreq.req.wValue & 0xFF) {
case UDI_CDC_IAD_STRING_ID:
str_lgt = sizeof(udi_cdc_name) - 1;
str = udi_cdc_name;

View File

@ -247,7 +247,7 @@ uint16_t HAL_adc_get_result(void) {
data = lowpass_filter[adc_channel].update(data);
#endif
return ((data >> 2) & 0x3ff); // return 10bit value as Marlin expects
return ((data >> 2) & 0x3FF); // return 10bit value as Marlin expects
}
#define SBIT_CNTEN 0

View File

@ -83,14 +83,14 @@
}
uint8_t spiRec() {
uint8_t b = spiTransfer(0xff);
uint8_t b = spiTransfer(0xFF);
return b;
}
void spiRead(uint8_t*buf, uint16_t nbyte) {
if (nbyte == 0) return;
for (int i = 0; i < nbyte; i++) {
buf[i] = spiTransfer(0xff);
buf[i] = spiTransfer(0xFF);
}
}

View File

@ -213,7 +213,7 @@ void LPC1768_PWM_sort(void) {
}
}
bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xff */) {
bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xFF */) {
pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF)); // Sometimes the upper byte is garbled

View File

@ -79,7 +79,7 @@
#include <U8glib.h>
#define I2C_SLA (0x3c*2)
#define I2C_SLA (0x3C*2)
//#define I2C_CMD_MODE 0x080
#define I2C_CMD_MODE 0x000
#define I2C_DATA_MODE 0x040

View File

@ -68,7 +68,7 @@ void delayMicroseconds(uint32_t us);
//void digitalWrite(int16_t pin, uint8_t pin_status);
#define I2C_SLA (0x3c*2)
#define I2C_SLA (0x3C*2)
//#define I2C_CMD_MODE 0x080
#define I2C_CMD_MODE 0x000
#define I2C_DATA_MODE 0x040

View File

@ -87,16 +87,16 @@
if ( rs == 0 )
/* command */
spiSend(0x0f8);
spiSend(0x0F8);
else
/* data */
spiSend(0x0fa);
spiSend(0x0FA);
for( i = 0; i < 4; i++ ) // give the controller some time to process the data
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
}
spiSend(val & 0x0f0);
spiSend(val & 0x0F0);
spiSend(val << 4);
}

View File

@ -73,16 +73,16 @@
if ( rs == 0 )
/* command */
swSpiTransfer(0x0f8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
swSpiTransfer(0x0F8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
else
/* data */
swSpiTransfer(0x0fa, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
swSpiTransfer(0x0FA, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
for( i = 0; i < 4; i++ ) // give the controller some time to process the data
u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
}
swSpiTransfer(val & 0x0f0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
swSpiTransfer(val << 4, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
}

View File

@ -68,7 +68,7 @@
//definitions for the chopper config register
#define CHOPPER_MODE_STANDARD 0x0ul
#define CHOPPER_MODE_T_OFF_FAST_DECAY 0x4000ul
#define T_OFF_PATTERN 0xful
#define T_OFF_PATTERN 0xFul
#define RANDOM_TOFF_TIME 0x2000ul
#define BLANK_TIMING_PATTERN 0x18000ul
#define BLANK_TIMING_SHIFT 15
@ -85,7 +85,7 @@
#define CURRENT_DOWN_STEP_SPEED_PATTERN 0x6000ul
#define SE_MAX_PATTERN 0xF00ul
#define SE_CURRENT_STEP_WIDTH_PATTERN 0x60ul
#define SE_MIN_PATTERN 0xful
#define SE_MIN_PATTERN 0xFul
//definitions for stall guard2 current register
#define STALL_GUARD_FILTER_ENABLED 0x10000ul