Standardize some hexadecimals
This commit is contained in:
@ -839,7 +839,7 @@
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REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0);
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// Disable PIO on A26 and A27
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REG_PIOA_PDR = 0x0c000000;
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REG_PIOA_PDR = 0x0C000000;
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OUT_WRITE(SDSS, 1);
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// Reset SPI0 (from sam lib)
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@ -122,16 +122,16 @@ static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
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if ( rs == 0 )
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/* command */
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spiSend_sw_DUE(0x0f8);
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spiSend_sw_DUE(0x0F8);
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else
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/* data */
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spiSend_sw_DUE(0x0fa);
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spiSend_sw_DUE(0x0FA);
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for (i = 0; i < 4; i++) // give the controller some time to process the data
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u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
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}
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spiSend_sw_DUE(val & 0x0f0);
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spiSend_sw_DUE(val & 0x0F0);
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spiSend_sw_DUE(val << 4);
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}
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@ -74,7 +74,7 @@ extern "C" {
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#define PLL_UPLL_HZ 480000000
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#define PLL_COUNT 0x3fU
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#define PLL_COUNT 0x3FU
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enum pll_source {
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PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator.
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@ -96,13 +96,13 @@ struct scsi_inquiry_data {
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#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
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#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
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#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
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#define SCSI_INQ_DT_ARRAY 0x0c //!< Storage Array Controller
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#define SCSI_INQ_DT_ENCLOSURE 0x0d //!< Enclosure Services
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#define SCSI_INQ_DT_RBC 0x0e //!< Simplified Direct Access
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#define SCSI_INQ_DT_OCRW 0x0f //!< Optical card reader/writer
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#define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller
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#define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services
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#define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access
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#define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer
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#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
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#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
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#define SCSI_INQ_DT_NONE 0x1f //!< No Peripheral
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#define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral
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uint8_t flags1; //!< Flags (byte 1)
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#define SCSI_INQ_RMB 0x80 //!< Removable Medium
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uint8_t version; //!< Version
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@ -213,17 +213,17 @@ enum scsi_sense_key {
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SCSI_SK_DATA_PROTECT = 0x7,
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SCSI_SK_BLANK_CHECK = 0x8,
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SCSI_SK_VENDOR_SPECIFIC = 0x9,
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SCSI_SK_COPY_ABORTED = 0xa,
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SCSI_SK_ABORTED_COMMAND = 0xb,
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SCSI_SK_VOLUME_OVERFLOW = 0xd,
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SCSI_SK_MISCOMPARE = 0xe,
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SCSI_SK_COPY_ABORTED = 0xA,
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SCSI_SK_ABORTED_COMMAND = 0xB,
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SCSI_SK_VOLUME_OVERFLOW = 0xD,
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SCSI_SK_MISCOMPARE = 0xE,
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};
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/* Additional Sense Code / Additional Sense Code Qualifier pairs */
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enum scsi_asc_ascq {
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SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
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SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
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SCSI_ASC_WRITE_ERROR = 0x0c00,
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SCSI_ASC_WRITE_ERROR = 0x0C00,
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SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
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SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
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SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
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@ -242,7 +242,7 @@ enum scsi_asc_ascq {
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enum scsi_spc_mode {
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SCSI_MS_MODE_VENDOR_SPEC = 0x00,
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SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
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SCSI_MS_MODE_ALL = 0x3f,
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SCSI_MS_MODE_ALL = 0x3F,
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};
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/**
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@ -289,7 +289,7 @@ static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
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static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
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{
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return cdb[2] & 0x3f;
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return cdb[2] & 0x3F;
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}
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static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
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@ -527,7 +527,7 @@ static bool udc_req_std_dev_set_feature(void)
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if (!udd_is_high_speed()) {
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break;
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}
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if (udd_g_ctrlreq.req.wIndex & 0xff) {
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if (udd_g_ctrlreq.req.wIndex & 0xFF) {
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break;
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}
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// Unconfigure the device, terminating all ongoing requests
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@ -618,7 +618,7 @@ static bool udc_req_std_dev_get_str_desc(void)
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uint8_t str_length = 0;
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// Link payload pointer to the string corresponding at request
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switch (udd_g_ctrlreq.req.wValue & 0xff) {
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switch (udd_g_ctrlreq.req.wValue & 0xFF) {
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case 0:
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udd_set_setup_payload((uint8_t *) &udc_string_desc_languageid,
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sizeof(udc_string_desc_languageid));
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@ -674,7 +674,7 @@ static bool udc_req_std_dev_get_descriptor(void)
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{
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uint8_t conf_num;
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conf_num = udd_g_ctrlreq.req.wValue & 0xff;
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conf_num = udd_g_ctrlreq.req.wValue & 0xFF;
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// Check descriptor ID
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switch ((uint8_t) (udd_g_ctrlreq.req.wValue >> 8)) {
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@ -271,7 +271,7 @@ enum usb_langid {
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/**
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* \brief Mask selecting the index part of an endpoint address
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*/
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#define USB_EP_ADDR_MASK 0x0f
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#define USB_EP_ADDR_MASK 0x0F
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//! \brief USB address identifier
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typedef uint8_t usb_add_t;
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@ -225,7 +225,7 @@ bool usb_task_extra_string(void) {
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uint8_t str_lgt = 0;
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// Link payload pointer to the string corresponding at request
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switch (udd_g_ctrlreq.req.wValue & 0xff) {
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switch (udd_g_ctrlreq.req.wValue & 0xFF) {
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case UDI_CDC_IAD_STRING_ID:
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str_lgt = sizeof(udi_cdc_name) - 1;
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str = udi_cdc_name;
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@ -247,7 +247,7 @@ uint16_t HAL_adc_get_result(void) {
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data = lowpass_filter[adc_channel].update(data);
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#endif
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return ((data >> 2) & 0x3ff); // return 10bit value as Marlin expects
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return ((data >> 2) & 0x3FF); // return 10bit value as Marlin expects
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}
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#define SBIT_CNTEN 0
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@ -83,14 +83,14 @@
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}
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uint8_t spiRec() {
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uint8_t b = spiTransfer(0xff);
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uint8_t b = spiTransfer(0xFF);
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return b;
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}
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void spiRead(uint8_t*buf, uint16_t nbyte) {
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if (nbyte == 0) return;
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for (int i = 0; i < nbyte; i++) {
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buf[i] = spiTransfer(0xff);
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buf[i] = spiTransfer(0xFF);
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}
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}
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@ -213,7 +213,7 @@ void LPC1768_PWM_sort(void) {
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}
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}
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bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xff */) {
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bool LPC1768_PWM_attach_pin(pin_t pin, uint32_t min /* = 1 */, uint32_t max /* = (LPC_PWM1_MR0 - 1) */, uint8_t servo_index /* = 0xFF */) {
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pin = GET_PIN_MAP_PIN(GET_PIN_MAP_INDEX(pin & 0xFF)); // Sometimes the upper byte is garbled
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@ -79,7 +79,7 @@
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#include <U8glib.h>
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#define I2C_SLA (0x3c*2)
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#define I2C_SLA (0x3C*2)
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//#define I2C_CMD_MODE 0x080
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#define I2C_CMD_MODE 0x000
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#define I2C_DATA_MODE 0x040
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@ -68,7 +68,7 @@ void delayMicroseconds(uint32_t us);
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//void digitalWrite(int16_t pin, uint8_t pin_status);
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#define I2C_SLA (0x3c*2)
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#define I2C_SLA (0x3C*2)
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//#define I2C_CMD_MODE 0x080
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#define I2C_CMD_MODE 0x000
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#define I2C_DATA_MODE 0x040
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@ -87,16 +87,16 @@
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if ( rs == 0 )
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/* command */
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spiSend(0x0f8);
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spiSend(0x0F8);
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else
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/* data */
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spiSend(0x0fa);
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spiSend(0x0FA);
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for( i = 0; i < 4; i++ ) // give the controller some time to process the data
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u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
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}
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spiSend(val & 0x0f0);
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spiSend(val & 0x0F0);
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spiSend(val << 4);
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}
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@ -73,16 +73,16 @@
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if ( rs == 0 )
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/* command */
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swSpiTransfer(0x0f8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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swSpiTransfer(0x0F8, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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else
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/* data */
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swSpiTransfer(0x0fa, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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swSpiTransfer(0x0FA, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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for( i = 0; i < 4; i++ ) // give the controller some time to process the data
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u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
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}
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swSpiTransfer(val & 0x0f0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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swSpiTransfer(val << 4, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
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}
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@ -68,7 +68,7 @@
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//definitions for the chopper config register
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#define CHOPPER_MODE_STANDARD 0x0ul
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#define CHOPPER_MODE_T_OFF_FAST_DECAY 0x4000ul
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#define T_OFF_PATTERN 0xful
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#define T_OFF_PATTERN 0xFul
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#define RANDOM_TOFF_TIME 0x2000ul
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#define BLANK_TIMING_PATTERN 0x18000ul
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#define BLANK_TIMING_SHIFT 15
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@ -85,7 +85,7 @@
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#define CURRENT_DOWN_STEP_SPEED_PATTERN 0x6000ul
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#define SE_MAX_PATTERN 0xF00ul
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#define SE_CURRENT_STEP_WIDTH_PATTERN 0x60ul
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#define SE_MIN_PATTERN 0xful
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#define SE_MIN_PATTERN 0xFul
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//definitions for stall guard2 current register
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#define STALL_GUARD_FILTER_ENABLED 0x10000ul
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