Clean up SPI and ST7920 defines (#19956)
This commit is contained in:
parent
4a39c8cd53
commit
22bf2b49c6
@ -49,10 +49,6 @@
|
||||
#undef SDSS
|
||||
#define SDSS SS_PIN
|
||||
|
||||
#if ENABLED(ENABLE_SPI3)
|
||||
#define SPI_DEVICE 3
|
||||
#elif ENABLED(ENABLE_SPI2)
|
||||
#define SPI_DEVICE 2
|
||||
#else
|
||||
#ifndef SPI_DEVICE
|
||||
#define SPI_DEVICE 1
|
||||
#endif
|
||||
|
@ -33,6 +33,38 @@
|
||||
|
||||
#include "ultralcd_st7920_u8glib_rrd_AVR.h"
|
||||
|
||||
#if F_CPU >= 20000000
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(50)
|
||||
#elif MB(3DRAG, K8200, K8400)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(188)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(MINIRAMBO, EINSY_RAMBO, EINSY_RETRO, SILVER_GATE)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(250)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(RAMBO)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(BQ_ZUM_MEGA_3D)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(189)
|
||||
#elif defined(ARDUINO_ARCH_STM32)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(300)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(40)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(340)
|
||||
#elif F_CPU == 16000000
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(63)
|
||||
#else
|
||||
#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd_AVR.h'"
|
||||
#endif
|
||||
|
||||
#ifndef ST7920_DELAY_1
|
||||
#ifdef BOARD_ST7920_DELAY_1
|
||||
#define ST7920_DELAY_1 BOARD_ST7920_DELAY_1
|
||||
|
@ -37,43 +37,6 @@
|
||||
|
||||
#include <U8glib.h>
|
||||
|
||||
// If you want you can define your own set of delays in Configuration.h
|
||||
//#define ST7920_DELAY_1 DELAY_NS(0)
|
||||
//#define ST7920_DELAY_2 DELAY_NS(0)
|
||||
//#define ST7920_DELAY_3 DELAY_NS(0)
|
||||
|
||||
#if F_CPU >= 20000000
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(50)
|
||||
#elif MB(3DRAG, K8200, K8400)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(188)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(MINIRAMBO, EINSY_RAMBO, EINSY_RETRO, SILVER_GATE)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(250)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(RAMBO)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(0)
|
||||
#elif MB(BQ_ZUM_MEGA_3D)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(189)
|
||||
#elif defined(ARDUINO_ARCH_STM32)
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(300)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(40)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(340)
|
||||
#elif F_CPU == 16000000
|
||||
#define CPU_ST7920_DELAY_1 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_2 DELAY_NS(0)
|
||||
#define CPU_ST7920_DELAY_3 DELAY_NS(63)
|
||||
#else
|
||||
#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd_AVR.h'"
|
||||
#endif
|
||||
|
||||
void ST7920_SWSPI_SND_8BIT(uint8_t val);
|
||||
|
||||
#if DOGM_SPI_DELAY_US > 0
|
||||
@ -82,8 +45,8 @@ void ST7920_SWSPI_SND_8BIT(uint8_t val);
|
||||
#define U8G_DELAY() DELAY_US(10)
|
||||
#endif
|
||||
|
||||
#define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); }
|
||||
#define ST7920_NCS() { WRITE(ST7920_CS_PIN,0); }
|
||||
#define ST7920_CS() { WRITE(ST7920_CS_PIN, HIGH); U8G_DELAY(); }
|
||||
#define ST7920_NCS() { WRITE(ST7920_CS_PIN, LOW); }
|
||||
#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xF8); U8G_DELAY(); }
|
||||
#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xFA); U8G_DELAY(); }
|
||||
#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xF0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4U)); U8G_DELAY(); }
|
||||
|
@ -871,6 +871,9 @@
|
||||
#undef ST7920_DELAY_1
|
||||
#undef ST7920_DELAY_2
|
||||
#undef ST7920_DELAY_3
|
||||
#undef BOARD_ST7920_DELAY_1
|
||||
#undef BOARD_ST7920_DELAY_2
|
||||
#undef BOARD_ST7920_DELAY_3
|
||||
#endif
|
||||
|
||||
#undef HAS_FREE_AUX2_PINS
|
||||
|
@ -210,14 +210,13 @@
|
||||
#endif
|
||||
|
||||
#if SD_CONNECTION_IS(LCD)
|
||||
#define ENABLE_SPI3
|
||||
#define SPI_DEVICE 3
|
||||
#define SD_DETECT_PIN PB9
|
||||
#define SCK_PIN PB3
|
||||
#define MISO_PIN PB4
|
||||
#define MOSI_PIN PB5
|
||||
#define SS_PIN PA15
|
||||
#elif SD_CONNECTION_IS(ONBOARD)
|
||||
#define ENABLE_SPI1
|
||||
#define SD_DETECT_PIN PA3
|
||||
#define SCK_PIN PA5
|
||||
#define MISO_PIN PA6
|
||||
|
@ -165,7 +165,6 @@
|
||||
// SD-NAND
|
||||
//
|
||||
#if SD_CONNECTION_IS(ONBOARD)
|
||||
#define ENABLE_SPI1
|
||||
#define SD_DETECT_PIN -1
|
||||
#define SCK_PIN PA5
|
||||
#define MISO_PIN PA6
|
||||
|
@ -185,7 +185,7 @@
|
||||
|
||||
// SPI1(PA7)=LCD & SPI3(PB5)=STUFF, are not available
|
||||
// Needs to use SPI2
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
#define MOSI_PIN PB15
|
||||
|
@ -200,7 +200,7 @@
|
||||
|
||||
// SPI1(PA7)=LCD & SPI3(PB5)=STUFF, are not available
|
||||
// so SPI2 is required.
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
#define MOSI_PIN PB15
|
||||
|
@ -56,7 +56,7 @@
|
||||
// SPI
|
||||
// Note: FLSun Hispeed (clone MKS_Robin_miniV2) board is using SPI2 interface.
|
||||
//
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
// SPI Flash
|
||||
#define HAS_SPI_FLASH 1
|
||||
|
@ -132,7 +132,7 @@
|
||||
//
|
||||
// LCD / Controller
|
||||
//
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
#define SS_PIN PB12
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
|
@ -166,7 +166,7 @@
|
||||
#endif
|
||||
|
||||
// SPI1(PA7) & SPI3(PB5) not available
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
#if ENABLED(SDIO_SUPPORT)
|
||||
#define SCK_PIN PB13 // SPI2
|
||||
|
@ -55,8 +55,7 @@
|
||||
//
|
||||
// Note: MKS Robin board is using SPI2 interface.
|
||||
//
|
||||
//#define SPI_MODULE 2
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
//
|
||||
// Limit Switches
|
||||
|
@ -167,7 +167,7 @@
|
||||
//
|
||||
// SD Card
|
||||
//
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
#define SD_DETECT_PIN PC10
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
|
@ -34,7 +34,6 @@
|
||||
|
||||
//#define DISABLE_DEBUG
|
||||
#define DISABLE_JTAG
|
||||
#define ENABLE_SPI2
|
||||
|
||||
//
|
||||
// Limit Switches
|
||||
@ -135,8 +134,12 @@
|
||||
//
|
||||
// SD Card
|
||||
//
|
||||
#define ENABLE_SPI2
|
||||
#define SD_DETECT_PIN PC10
|
||||
|
||||
//
|
||||
// SPI
|
||||
//
|
||||
#define SPI_DEVICE 2
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN P1B4
|
||||
#define MOSI_PIN P1B5
|
||||
|
@ -38,7 +38,6 @@
|
||||
|
||||
//#define DISABLE_DEBUG
|
||||
#define DISABLE_JTAG
|
||||
#define ENABLE_SPI2
|
||||
|
||||
//
|
||||
// Servos
|
||||
@ -87,9 +86,9 @@
|
||||
//
|
||||
// Temperature Sensors
|
||||
//
|
||||
#define TEMP_BED_PIN PA1 //TB
|
||||
#define TEMP_0_PIN PA0 //TH1
|
||||
#define TEMP_1_PIN PA2 //TH2
|
||||
#define TEMP_BED_PIN PA1 // TB
|
||||
#define TEMP_0_PIN PA0 // TH1
|
||||
#define TEMP_1_PIN PA2 // TH2
|
||||
|
||||
#define FIL_RUNOUT_PIN PB10 // MT_DET
|
||||
|
||||
@ -132,24 +131,22 @@
|
||||
|
||||
#endif // !MKS_MINI_12864
|
||||
|
||||
#define BOARD_ST7920_DELAY_1 DELAY_NS(125)
|
||||
#define BOARD_ST7920_DELAY_2 DELAY_NS(125)
|
||||
#define BOARD_ST7920_DELAY_3 DELAY_NS(125)
|
||||
|
||||
#endif // HAS_WIRED_LCD
|
||||
|
||||
//
|
||||
// SD Card
|
||||
//
|
||||
#define ENABLE_SPI2
|
||||
#define SD_DETECT_PIN PC10
|
||||
|
||||
//
|
||||
// SPI
|
||||
//
|
||||
#define SPI_DEVICE 2
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
#define MOSI_PIN PB15
|
||||
#define SS_PIN PA15
|
||||
|
||||
#ifndef BOARD_ST7920_DELAY_1
|
||||
#define BOARD_ST7920_DELAY_1 DELAY_NS(125)
|
||||
#endif
|
||||
#ifndef BOARD_ST7920_DELAY_2
|
||||
#define BOARD_ST7920_DELAY_2 DELAY_NS(125)
|
||||
#endif
|
||||
#ifndef BOARD_ST7920_DELAY_3
|
||||
#define BOARD_ST7920_DELAY_3 DELAY_NS(125)
|
||||
#endif
|
||||
|
@ -48,7 +48,7 @@
|
||||
#define MARLIN_EEPROM_SIZE EEPROM_PAGE_SIZE // 2KB
|
||||
#endif
|
||||
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
//
|
||||
// Limit Switches
|
||||
|
@ -48,7 +48,7 @@
|
||||
#define MARLIN_EEPROM_SIZE EEPROM_PAGE_SIZE // 2KB
|
||||
#endif
|
||||
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
//
|
||||
// Limit Switches
|
||||
|
@ -55,8 +55,7 @@
|
||||
//
|
||||
// Note: MKS Robin board is using SPI2 interface.
|
||||
//
|
||||
//#define SPI_MODULE 2
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
//
|
||||
// Limit Switches
|
||||
|
@ -41,8 +41,7 @@
|
||||
//
|
||||
// Note: MKS Robin board is using SPI2 interface.
|
||||
//
|
||||
//#define SPI_MODULE 2
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
//
|
||||
// Servos
|
||||
@ -191,7 +190,6 @@
|
||||
#endif
|
||||
|
||||
#if SD_CONNECTION_IS(LCD)
|
||||
#define ENABLE_SPI2
|
||||
#define SD_DETECT_PIN PG3
|
||||
#define SCK_PIN PB13
|
||||
#define MISO_PIN PB14
|
||||
|
@ -173,7 +173,7 @@
|
||||
#endif
|
||||
|
||||
// SPI1(PA7) & SPI3(PB5) not available
|
||||
#define ENABLE_SPI2
|
||||
#define SPI_DEVICE 2
|
||||
|
||||
#if ENABLED(SDIO_SUPPORT)
|
||||
#define SCK_PIN PB13 // SPI2 ok
|
||||
|
@ -46,8 +46,6 @@
|
||||
#define FLASH_EEPROM_LEVELING
|
||||
#endif
|
||||
|
||||
#define ENABLE_SPI1
|
||||
|
||||
#include "pins_RUMBA32_common.h"
|
||||
|
||||
#if HAS_TMC_UART
|
||||
|
Loading…
Reference in New Issue
Block a user