105 lines
3.1 KiB
ArmAsm
105 lines
3.1 KiB
ArmAsm
/* *****************************************************************************
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* The MIT License
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*
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* Copyright (c) 2010 Perry Hung.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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* ****************************************************************************/
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# On an exception, push a fake stack thread mode stack frame and redirect
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# thread execution to a thread mode error handler
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# From RM008:
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# The SP is decremented by eight words by the completion of the stack push.
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# Figure 5-1 shows the contents of the stack after an exception pre-empts the
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# current program flow.
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#
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# Old SP--> <previous>
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# xPSR
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# PC
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# LR
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# r12
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# r3
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# r2
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# r1
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# SP--> r0
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.text
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.globl __exc_nmi
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.weak __exc_nmi
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.globl __exc_hardfault
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.weak __exc_hardfault
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.globl __exc_memmanage
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.weak __exc_memmanage
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.globl __exc_busfault
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.weak __exc_busfault
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.globl __exc_usagefault
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.weak __exc_usagefault
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.code 16
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.thumb_func
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__exc_nmi:
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mov r0, #1
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b __default_exc
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.thumb_func
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__exc_hardfault:
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mov r0, #2
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b __default_exc
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.thumb_func
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__exc_memmanage:
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mov r0, #3
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b __default_exc
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.thumb_func
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__exc_busfault:
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mov r0, #4
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b __default_exc
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.thumb_func
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__exc_usagefault:
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mov r0, #5
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b __default_exc
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.thumb_func
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__default_exc:
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ldr r2, NVIC_CCR @ Enable returning to thread mode even if there are
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mov r1 ,#1 @ pending exceptions. See flag NONEBASETHRDENA.
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str r1, [r2]
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cpsid i @ Disable global interrupts
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ldr r2, SYSTICK_CSR @ Disable systick handler
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mov r1, #0
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str r1, [r2]
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ldr r1, CPSR_MASK @ Set default CPSR
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push {r1}
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ldr r1, TARGET_PC @ Set target pc
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push {r1}
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sub sp, sp, #24 @ Don't care
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ldr r1, EXC_RETURN @ Return to thread mode
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mov lr, r1
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bx lr @ Exception exit
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.align 4
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CPSR_MASK: .word 0x61000000
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EXC_RETURN: .word 0xFFFFFFF9
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TARGET_PC: .word __error
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NVIC_CCR: .word 0xE000ED14 @ NVIC configuration control register
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SYSTICK_CSR: .word 0xE000E010 @ Systick control register
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