c0920bbf6a
* split tft folder in two: tft for color ui; tft_io for shared tft code * after the files got moved, now the code was moved to the right place * classic ui using TFT IO init lcd codes * feature to compile tft_io when enabled * compiling fix * lvgl spi tft working with tft io init codes * there is no need for separeted fsmc and spi class in lvgl anymore, as tft io handle everything * remove debug * base for TFT rotation and mirroring API, and ILI9488 support * ST7796S rotate and mirror support * ST7789V rotate and mirror support * ST7735 rotate and mirror support * ILI9341 rotate and mirror support * ILI9328 rotate and mirror support * R61505 rotate and mirror support * MKS TFT definitions * more configs for mks tfts * update config * naming typo * to configure the user interface * ANYCUBIC_TFT35 * tft configs * support for SSD1963 * tft display types * updated conditionals lcd; first board fully working with the new code - all 3 ui! * compatiblity * changed name * move classic ui file name * rename TURN -> ROTATE * GRAPHICAL_TFT_ROTATE_180 deprecated * first fsmc board fully working - chitu v5 * mks robin nano v1.2 + tft 35 ok! * right pin name * anycubic tft tested in a TRIGORILLA_PRO * chitu v6 * nano 32 tft orientation * mks tft43 * mks tft43 rotation * fixed LONGER LK tft setup * GRAPHICAL_TFT_UPSCALE defined by the display type * better offsets defaults * Update Configuration.h * Update tft_fsmc.cpp * Update Conditionals_LCD.h * Tweak comments * update nano tests * Revert "update nano tests" This reverts commit a071ebbfad30e28855a4a5695ec8a726542a1a65. * default tft * outdated comments * to not break non-vscode builds * upscale tft 35 * support tft 180 rotation for color ui * Each TFT Driver is responsible for its default color mode. * use auto detect in mks displays, because some of them could be shipped with diferent drivers * extra s * unused code * wrong -1 * missing mirror options * Smaller regex pattern * Comment updates * Clean up old defines * Apply pins formatting * GRAPHICAL_TFT_ROTATE_180 => TFT_ROTATE_180 * MKS_ROBIN_TFT_V1_1R * merge fix * correct resolution * auto is default, dont need be there, and it will allow the user to configure it even for named displays * to not use rotation with MKS_ROBIN_TFT_V1_1R * i like () in macros * avoid sleepy commits * default for st7789 is rgb * nano follow up * to allow ili9328 rotation * default is rgb * boards merge follow up * to match bootloader orientation * HAS_TOUCH_XPT2046 is not hal specific anymore * lets not forget LPC * 180 rotation for ili9328 and R61505 * Clean up whitespace Co-authored-by: Scott Lahteine <thinkyhead@users.noreply.github.com> Co-authored-by: Scott Lahteine <github@thinkyhead.com>
132 lines
6.4 KiB
C
132 lines
6.4 KiB
C
/**
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* Marlin 3D Printer Firmware
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* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*
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*/
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#pragma once
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#include "tft_io.h"
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#include "../../inc/MarlinConfig.h"
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#define SSD1963_MADCTL_MY 0x80 // Row Address Order
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#define SSD1963_MADCTL_MX 0x40 // Column Address Order
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#define SSD1963_MADCTL_MV 0x20 // Row/Column Exchange
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#define SSD1963_MADCTL_MH 0x10 // Horizontal Refresh Order
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#define SSD1963_MADCTL_BGR 0x08 // RGB-BGR ORDER
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#define SSD1963_MADCTL_RGB 0x00
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#define SSD1963_MADCTL_ML 0x04 // Vertical Refresh Order
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#define SSD1963_MADCTL_FH 0x02 // Flip Horizontal
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#define SSD1963_MADCTL_FV 0x01 // Flip Vertical
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#define SSD1963_ORIENTATION IF_0((TFT_ORIENTATION) & TFT_EXCHANGE_XY, SSD1963_MADCTL_MV) | \
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IF_0((TFT_ORIENTATION) & TFT_INVERT_X, SSD1963_MADCTL_FH) | \
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IF_0((TFT_ORIENTATION) & TFT_INVERT_Y, SSD1963_MADCTL_FV)
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#if !defined(TFT_COLOR) || TFT_COLOR == TFT_COLOR_BGR
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#define SSD1963_COLOR SSD1963_MADCTL_BGR
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#elif TFT_COLOR == TFT_COLOR_RGB
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#define SSD1963_COLOR SSD1963_MADCTL_RGB
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#endif
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#define SSD1963_MADCTL_DATA (SSD1963_ORIENTATION) | (SSD1963_COLOR)
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#define SSD1963_NOP 0x00 // No Operation
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#define SSD1963_SWRESET 0x01 // Software reset
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#define SSD1963_RDDPM 0x0A // Read Display Power Mode
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#define SSD1963_RDDMADCTL 0x0B // Read Display MADCTL
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#define SSD1963_RDDCOLMOD 0x0C // Read Display Pixel Format
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#define SSD1963_RDDIM 0x0D // Read Display Image Mode
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#define SSD1963_RDDSM 0x0E // Read Display Signal Mode
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#define SSD1963_SLPIN 0x10 // Sleep In
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#define SSD1963_SLPOUT 0x11 // Sleep Out
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#define SSD1963_PTLON 0x12 // Partial Display Mode On
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#define SSD1963_NORON 0x13 // Normal Display Mode On
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#define SSD1963_INVOFF 0x20 // Display Inversion Off
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#define SSD1963_INVON 0x21 // Display Inversion On
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#define SSD1963_GAMSET 0x26 // Gamma Set
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#define SSD1963_DISPOFF 0x28 // Display Off
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#define SSD1963_DISPON 0x29 // Display On
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#define SSD1963_CASET 0x2A // Column Address Set
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#define SSD1963_RASET 0x2B // Row Address Set
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#define SSD1963_RAMWR 0x2C // Memory Write
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#define SSD1963_RAMRD 0x2E // Memory Read
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#define SSD1963_PTLAR 0x30 // Partial Area
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#define SSD1963_VSCRDEF 0x33 // Vertical Scrolling Definition
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#define SSD1963_TEOFF 0x34 // Tearing Effect Line OFF
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#define SSD1963_TEON 0x35 // Tearing Effect Line ON
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#define SSD1963_MADCTL 0x36 // Memory Data Access Control
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#define SSD1963_VSCSAD 0x37 // Vertical Scroll Start Address of RAM
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#define SSD1963_IDMOFF 0x38 // Idle Mode Off
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#define SSD1963_IDMON 0x39 // Idle Mode On
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#define SSD1963_WRMEMC 0x3C // Write Memory Continue
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#define SSD1963_RDMEMC 0x3E // Read Memory Continue
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#define SSD1963_STE 0x44 // Set Tear Scanline
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#define SSD1963_GSCAN 0x45 // Get Scanline
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#define SSD1963_WRDISBV 0x51 // Write Display Brightness
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#define SSD1963_RDDISBV 0x52 // Read Display Brightness
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#define SSD1963_WRCTRLD 0x53 // Write CTRL Display
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#define SSD1963_RDCTRLD 0x54 // Read CTRL Value Display
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#define SSD1963_WRCACE 0x55 // Write Content Adaptive Brightness Control and Color Enhancement
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#define SSD1963_RDCABC 0x56 // Read Content Adaptive Brightness Control
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#define SSD1963_WRCABCMB 0x5E // Write CABC Minimum Brightness
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#define SSD1963_RDCABCMB 0x5F // Read CABC Minimum Brightness
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#define SSD1963_RDABCSDR 0x68 // Read Automatic Brightness Control Self-Diagnostic Result
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#define SSD1963_RDDDB 0xA1 // Read Device Descriptor Block
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#define SSD1963_SLCDMODE 0xB0 // Set the LCD panel mode and resolution
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#define SSD1963_SHSYNC 0xB4 // Set HSYNC
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#define SSD1963_GHSYNC 0xB5 // Get HSYNC
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#define SSD1963_SVSYNC 0xB6 // Set VSYNC
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#define SSD1963_GVSYNC 0xB7 // Get VSYNC
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#define SSD1963_SGPIOCFG 0xB8 // Set GPIO Conf
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#define SSD1963_SGPIOV 0xBA // Set GPIO Value
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#define SSD1963_SPWMCFG 0xBE // Set PWM Conf
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#define SSD1963_GPWMCFG 0xBF // Get PWM Conf
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#define SSD1963_SDBCCFG 0xD0 // Set Dynamic Back Light Config
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#define SSD1963_GDBCCFG 0xD1 // Get Dynamic Back Light Config
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#define SSD1963_PLLON 0xE0 // PLL Enable
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#define SSD1963_PLLMN 0xE2 // Set PLL Multiplier
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#define SSD1963_SLSHIFT 0xE6 // Set the LSHIFT (pixel clock) frequency
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#define SSD1963_COLMOD 0xF0 // Interface Pixel Format
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static const uint16_t ssd1963_init[] = {
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DATASIZE_8BIT,
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ESC_REG(SSD1963_PLLMN), 0x0023, 0x0002, 0x0054,
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ESC_REG(SSD1963_PLLON), 0x0001, ESC_DELAY(10),
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ESC_REG(SSD1963_PLLON), 0x0003, ESC_DELAY(10),
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ESC_REG(SSD1963_SWRESET), ESC_DELAY(100),
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ESC_REG(SSD1963_SLSHIFT), 0x0001, 0x001F, 0x00FF,
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ESC_REG(SSD1963_SLCDMODE), 0x0020, 0x0000, 0x0001, 0x00DF, 0x0001, 0x000F, 0x0000,
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ESC_REG(SSD1963_SHSYNC), 0x0002, 0x0013, 0x0000, 0x0008, 0x002B, 0x0000, 0x0002, 0x0000,
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ESC_REG(SSD1963_SVSYNC), 0x0001, 0x0020, 0x0000, 0x0004, 0x000C, 0x0000, 0x0002,
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ESC_REG(SSD1963_SGPIOV), 0x000F,
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ESC_REG(SSD1963_SGPIOCFG), 0x0007, 0x0001,
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ESC_REG(SSD1963_MADCTL), SSD1963_MADCTL_DATA,
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ESC_REG(SSD1963_COLMOD), 0x0003, ESC_DELAY(1),//RBG 565
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ESC_REG(SSD1963_NORON),
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ESC_REG(SSD1963_DISPON),
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ESC_REG(SSD1963_SPWMCFG), 0x0006, 0x00f0, 0x0001, 0x00f0, 0x0000, 0x0000,
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ESC_REG(SSD1963_SDBCCFG), 0x000D,
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ESC_END
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};
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