bissen21/Marlin_Firmware
1
0
Fork 0
Code Issues Pull Requests Projects Releases 4 Wiki Activity

✨ TFT_COLOR_UI async DMA SPI (#24980)

Browse Source
This commit is contained in:
Alexander Gavrilenko
2022-12-13 00:13:31 +03:00
committed by Scott Lahteine
parent d082223fee
commit ec6349f2ac
31 changed files with 500 additions and 227 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
buildroot/share/PlatformIO/variants/marlin_maple_CHITU_F103/board/board.h
View File

@ -63,7 +63,6 @@
* SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
* leave the definitions so as not to clutter things up. This is only
* OK since RET6 Ed. is specifically advertised as a beta board. */
#define BOARD_NR_SPI 3
#define BOARD_SPI1_NSS_PIN PA4
#define BOARD_SPI1_SCK_PIN PA5
#define BOARD_SPI1_MISO_PIN PA6
@ -79,7 +78,6 @@
#define BOARD_SPI3_MISO_PIN PB4
#define BOARD_SPI3_MOSI_PIN PB5
/* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/
#define BOARD_NR_GPIO_PINS 112
/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which

5
buildroot/share/PlatformIO/variants/marlin_maple_MEEB_3DP/board/board.h
View File

@ -63,26 +63,21 @@
* SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
* leave the definitions so as not to clutter things up. This is only
* OK since RET6 Ed. is specifically advertised as a beta board. */
#define BOARD_NR_SPI 3
#define BOARD_SPI1_NSS_PIN PA4
#define BOARD_SPI1_SCK_PIN PA5
#define BOARD_SPI1_MISO_PIN PA6
#define BOARD_SPI1_MOSI_PIN PA7
#define BOARD_SPI2_NSS_PIN PB12
#define BOARD_SPI2_SCK_PIN PB13
#define BOARD_SPI2_MISO_PIN PB14
#define BOARD_SPI2_MOSI_PIN PB15
#define BOARD_SPI3_NSS_PIN PA15
#define BOARD_SPI3_SCK_PIN PB3
#define BOARD_SPI3_MISO_PIN PB4
#define BOARD_SPI3_MOSI_PIN PB5
/* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/
#define BOARD_NR_GPIO_PINS 51
/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which