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✨ BigTreeTech SKR3 - STM32H743 (#24271, #24272, #24275)

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Co-Authored-By: Alan.Ma <alansayyeah@gmail.com>
This commit is contained in:
BIGTREETECH
2022-06-02 17:02:06 +08:00
committed by Scott Lahteine
parent 11d68e3127
commit e784e04132
13 changed files with 2254 additions and 225 deletions
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398
Marlin/src/HAL/STM32/sdio.cpp
View File

@ -35,42 +35,15 @@
// use local drivers
#if defined(STM32F103xE) || defined(STM32F103xG)
#include <stm32f1xx_hal_rcc_ex.h>
#include <stm32f1xx_hal_sd.h>
#include <stm32f1xx.h>
#elif defined(STM32F4xx)
#include <stm32f4xx_hal_rcc.h>
#include <stm32f4xx_hal_dma.h>
#include <stm32f4xx_hal_gpio.h>
#include <stm32f4xx_hal_sd.h>
#include <stm32f4xx.h>
#elif defined(STM32F7xx)
#include <stm32f7xx_hal_rcc.h>
#include <stm32f7xx_hal_dma.h>
#include <stm32f7xx_hal_gpio.h>
#include <stm32f7xx_hal_sd.h>
#include <stm32f7xx.h>
#elif defined(STM32H7xx)
#include <stm32h7xx.h>
#else
#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, or STM32F7xx."
#endif
SD_HandleTypeDef hsd; // create SDIO structure
// F4 supports one DMA for RX and another for TX, but Marlin will never
// do read and write at same time, so we use the same DMA for both.
DMA_HandleTypeDef hdma_sdio;
/*
SDIO_INIT_CLK_DIV is 118
SDIO clock frequency is 48MHz / (TRANSFER_CLOCK_DIV + 2)
SDIO init clock frequency should not exceed 400kHz = 48MHz / (118 + 2)
Default TRANSFER_CLOCK_DIV is 2 (118 / 40)
Default SDIO clock frequency is 48MHz / (2 + 2) = 12 MHz
This might be too fast for stable SDIO operations
MKS Robin board seems to have stable SDIO with BusWide 1bit and ClockDiv 8 i.e. 4.8MHz SDIO clock frequency
Additional testing is required as there are clearly some 4bit initialization problems
*/
#ifndef USBD_OK
#define USBD_OK 0
#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, STM32F7xx, or STM32H7xx."
#endif
// Target Clock, configurable. Default is 18MHz, from STM32F1
@ -78,223 +51,209 @@ DMA_HandleTypeDef hdma_sdio;
#define SDIO_CLOCK 18000000 // 18 MHz
#endif
// SDIO retries, configurable. Default is 3, from STM32F1
#ifndef SDIO_READ_RETRIES
#define SDIO_READ_RETRIES 3
#endif
#define SD_TIMEOUT 1000 // ms
// SDIO Max Clock (naming from STM Manual, don't change)
#define SDIOCLK 48000000
static uint32_t clock_to_divider(uint32_t clk) {
// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
// Also limited to no more than 48Mhz (SDIOCLK).
const uint32_t pclk2 = HAL_RCC_GetPCLK2Freq();
clk = min(clk, (uint32_t)(pclk2 * 8 / 3));
clk = min(clk, (uint32_t)SDIOCLK);
// Round up divider, so we don't run the card over the speed supported,
// and subtract by 2, because STM32 will add 2, as written in the manual:
// SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]
return pclk2 / clk + (pclk2 % clk != 0) - 2;
#if defined(STM32F1xx)
DMA_HandleTypeDef hdma_sdio;
extern "C" void DMA2_Channel4_5_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_sdio);
}
#elif defined(STM32F4xx)
DMA_HandleTypeDef hdma_sdio_rx;
DMA_HandleTypeDef hdma_sdio_tx;
extern "C" void DMA2_Stream3_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_sdio_rx);
}
extern "C" void DMA2_Stream6_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_sdio_tx);
}
#elif defined(STM32H7xx)
#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
#define SDIO SDMMC1
#define SDIO_IRQn SDMMC1_IRQn
#define SDIO_IRQHandler SDMMC1_IRQHandler
#define SDIO_CLOCK_EDGE_RISING SDMMC_CLOCK_EDGE_RISING
#define SDIO_CLOCK_POWER_SAVE_DISABLE SDMMC_CLOCK_POWER_SAVE_DISABLE
#define SDIO_BUS_WIDE_1B SDMMC_BUS_WIDE_1B
#define SDIO_BUS_WIDE_4B SDMMC_BUS_WIDE_4B
#define SDIO_HARDWARE_FLOW_CONTROL_DISABLE SDMMC_HARDWARE_FLOW_CONTROL_DISABLE
#endif
uint8_t waitingRxCplt = 0;
uint8_t waitingTxCplt = 0;
SD_HandleTypeDef hsd;
extern "C" void SDIO_IRQHandler(void) {
HAL_SD_IRQHandler(&hsd);
}
void go_to_transfer_speed() {
/* Default SDIO peripheral configuration for SD card initialization */
hsd.Init.ClockEdge = hsd.Init.ClockEdge;
hsd.Init.ClockBypass = hsd.Init.ClockBypass;
hsd.Init.ClockPowerSave = hsd.Init.ClockPowerSave;
hsd.Init.BusWide = hsd.Init.BusWide;
hsd.Init.HardwareFlowControl = hsd.Init.HardwareFlowControl;
hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
/* Initialize SDIO peripheral interface with default configuration */
SDIO_Init(hsd.Instance, hsd.Init);
void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsdio) {
waitingTxCplt = 0;
}
void SD_LowLevel_Init(void) {
uint32_t tempreg;
__HAL_RCC_GPIOC_CLK_ENABLE(); //enable GPIO clocks
__HAL_RCC_GPIOD_CLK_ENABLE(); //enable GPIO clocks
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = 1; //GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
#if DISABLED(STM32F1xx)
GPIO_InitStruct.Alternate = GPIO_AF12_SDIO;
#endif
GPIO_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_12; // D0 & SCK
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsdio) {
waitingRxCplt = 0;
}
void HAL_SD_MspInit(SD_HandleTypeDef *hsd) {
pinmap_pinout(PC_12, PinMap_SD);
pinmap_pinout(PD_2, PinMap_SD);
pinmap_pinout(PC_8, PinMap_SD);
#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // define D1-D3 only if have a four bit wide SDIO bus
GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11; // D1-D3
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
// D1-D3
pinmap_pinout(PC_9, PinMap_SD);
pinmap_pinout(PC_10, PinMap_SD);
pinmap_pinout(PC_11, PinMap_SD);
#endif
// Configure PD.02 CMD line
GPIO_InitStruct.Pin = GPIO_PIN_2;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
// Setup DMA
#if defined(STM32F1xx)
hdma_sdio.Init.Mode = DMA_NORMAL;
hdma_sdio.Instance = DMA2_Channel4;
HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
#elif defined(STM32F4xx)
hdma_sdio.Init.Mode = DMA_PFCTRL;
hdma_sdio.Instance = DMA2_Stream3;
hdma_sdio.Init.Channel = DMA_CHANNEL_4;
hdma_sdio.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_sdio.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_sdio.Init.MemBurst = DMA_MBURST_INC4;
hdma_sdio.Init.PeriphBurst = DMA_PBURST_INC4;
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
#endif
__HAL_RCC_SDIO_CLK_ENABLE();
HAL_NVIC_EnableIRQ(SDIO_IRQn);
hdma_sdio.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_sdio.Init.MemInc = DMA_MINC_ENABLE;
hdma_sdio.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_sdio.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_sdio.Init.Priority = DMA_PRIORITY_LOW;
__HAL_LINKDMA(&hsd, hdmarx, hdma_sdio);
__HAL_LINKDMA(&hsd, hdmatx, hdma_sdio);
// DMA Config
#if defined(STM32F1xx)
__HAL_RCC_SDIO_CLK_ENABLE();
__HAL_RCC_DMA2_CLK_ENABLE();
#else
__HAL_RCC_SDIO_FORCE_RESET();
delay(2);
__HAL_RCC_SDIO_RELEASE_RESET();
delay(2);
__HAL_RCC_SDIO_CLK_ENABLE();
HAL_NVIC_EnableIRQ(DMA2_Channel4_5_IRQn);
hdma_sdio.Instance = DMA2_Channel4;
hdma_sdio.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_sdio.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_sdio.Init.MemInc = DMA_MINC_ENABLE;
hdma_sdio.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_sdio.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_sdio.Init.Mode = DMA_NORMAL;
hdma_sdio.Init.Priority = DMA_PRIORITY_LOW;
HAL_DMA_Init(&hdma_sdio);
__HAL_RCC_DMA2_FORCE_RESET();
delay(2);
__HAL_RCC_DMA2_RELEASE_RESET();
delay(2);
__HAL_LINKDMA(hsd, hdmarx ,hdma_sdio);
__HAL_LINKDMA(hsd, hdmatx, hdma_sdio);
#elif defined(STM32F4xx)
__HAL_RCC_DMA2_CLK_ENABLE();
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
hdma_sdio_rx.Instance = DMA2_Stream3;
hdma_sdio_rx.Init.Channel = DMA_CHANNEL_4;
hdma_sdio_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_sdio_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_sdio_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_sdio_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_sdio_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_sdio_rx.Init.Mode = DMA_PFCTRL;
hdma_sdio_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_sdio_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_sdio_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_sdio_rx.Init.MemBurst = DMA_MBURST_INC4;
hdma_sdio_rx.Init.PeriphBurst = DMA_PBURST_INC4;
HAL_DMA_Init(&hdma_sdio_rx);
__HAL_LINKDMA(hsd,hdmarx,hdma_sdio_rx);
hdma_sdio_tx.Instance = DMA2_Stream6;
hdma_sdio_tx.Init.Channel = DMA_CHANNEL_4;
hdma_sdio_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_sdio_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_sdio_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_sdio_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_sdio_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_sdio_tx.Init.Mode = DMA_PFCTRL;
hdma_sdio_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_sdio_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_sdio_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_sdio_tx.Init.MemBurst = DMA_MBURST_INC4;
hdma_sdio_tx.Init.PeriphBurst = DMA_PBURST_INC4;
HAL_DMA_Init(&hdma_sdio_tx);
__HAL_LINKDMA(hsd,hdmatx,hdma_sdio_tx);
#endif
//Initialize the SDIO (with initial <400Khz Clock)
tempreg = 0; //Reset value
tempreg |= SDIO_CLKCR_CLKEN; // Clock enabled
tempreg |= SDIO_INIT_CLK_DIV; // Clock Divider. Clock = 48000 / (118 + 2) = 400Khz
// Keep the rest at 0 => HW_Flow Disabled, Rising Clock Edge, Disable CLK ByPass, Bus Width = 0, Power save Disable
SDIO->CLKCR = tempreg;
// Power up the SDIO
SDIO_PowerState_ON(SDIO);
hsd.Instance = SDIO;
}
void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { // application specific init
UNUSED(hsd); // Prevent unused argument(s) compilation warning
__HAL_RCC_SDIO_CLK_ENABLE(); // turn on SDIO clock
void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) {
#if !defined(STM32F1xx)
__HAL_RCC_SDIO_FORCE_RESET();
delay(10);
__HAL_RCC_SDIO_RELEASE_RESET();
delay(10);
#endif
}
static uint32_t clock_to_divider(uint32_t clk) {
#if defined(STM32H7xx)
// SDMMC_CK frequency = sdmmc_ker_ck / [2 * CLKDIV].
uint32_t sdmmc_clk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC);
return sdmmc_clk / (2U * SDIO_CLOCK) + (sdmmc_clk % (2U * SDIO_CLOCK) != 0);
#else
// limit the SDIO master clock to 8/3 of PCLK2. See STM32 Manuals
// Also limited to no more than 48Mhz (SDIOCLK).
const uint32_t pclk2 = HAL_RCC_GetPCLK2Freq();
clk = min(clk, (uint32_t)(pclk2 * 8 / 3));
clk = min(clk, (uint32_t)SDIOCLK);
// Round up divider, so we don't run the card over the speed supported,
// and subtract by 2, because STM32 will add 2, as written in the manual:
// SDIO_CK frequency = SDIOCLK / [CLKDIV + 2]
return pclk2 / clk + (pclk2 % clk != 0) - 2;
#endif
}
bool SDIO_Init() {
uint8_t retryCnt = SDIO_READ_RETRIES;
HAL_StatusTypeDef sd_state = HAL_OK;
if (hsd.Instance == SDIO)
HAL_SD_DeInit(&hsd);
bool status;
/* HAL SD initialization */
hsd.Instance = SDIO;
hsd.State = HAL_SD_STATE_RESET;
hsd.Init.ClockEdge = SDIO_CLOCK_EDGE_RISING;
hsd.Init.ClockPowerSave = SDIO_CLOCK_POWER_SAVE_DISABLE;
hsd.Init.BusWide = SDIO_BUS_WIDE_1B;
hsd.Init.HardwareFlowControl = SDIO_HARDWARE_FLOW_CONTROL_DISABLE;
hsd.Init.ClockDiv = clock_to_divider(SDIO_CLOCK);
sd_state = HAL_SD_Init(&hsd);
SD_LowLevel_Init();
uint8_t retry_Cnt = retryCnt;
for (;;) {
hal.watchdog_refresh();
status = (bool) HAL_SD_Init(&hsd);
if (!status) break;
if (!--retry_Cnt) return false; // return failing status if retries are exhausted
}
go_to_transfer_speed();
#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3) // go to 4 bit wide mode if pins are defined
retry_Cnt = retryCnt;
for (;;) {
hal.watchdog_refresh();
if (!HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B)) break; // some cards are only 1 bit wide so a pass here is not required
if (!--retry_Cnt) break;
}
if (!retry_Cnt) { // wide bus failed, go back to one bit wide mode
hsd.State = (HAL_SD_StateTypeDef) 0; // HAL_SD_STATE_RESET
SD_LowLevel_Init();
retry_Cnt = retryCnt;
for (;;) {
hal.watchdog_refresh();
status = (bool) HAL_SD_Init(&hsd);
if (!status) break;
if (!--retry_Cnt) return false; // return failing status if retries are exhausted
}
go_to_transfer_speed();
#if PINS_EXIST(SDIO_D1, SDIO_D2, SDIO_D3)
if (sd_state == HAL_OK) {
sd_state = HAL_SD_ConfigWideBusOperation(&hsd, SDIO_BUS_WIDE_4B);
}
#endif
return true;
}
static bool SDIO_ReadWriteBlock_DMA(uint32_t block, const uint8_t *src, uint8_t *dst) {
if (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) return false;
hal.watchdog_refresh();
HAL_StatusTypeDef ret;
if (src) {
hdma_sdio.Init.Direction = DMA_MEMORY_TO_PERIPH;
HAL_DMA_Init(&hdma_sdio);
ret = HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t *)src, block, 1);
}
else {
hdma_sdio.Init.Direction = DMA_PERIPH_TO_MEMORY;
HAL_DMA_Init(&hdma_sdio);
ret = HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t *)dst, block, 1);
}
if (ret != HAL_OK) {
HAL_DMA_Abort_IT(&hdma_sdio);
HAL_DMA_DeInit(&hdma_sdio);
return false;
}
millis_t timeout = millis() + 500;
// Wait the transfer
while (hsd.State != HAL_SD_STATE_READY) {
if (ELAPSED(millis(), timeout)) {
HAL_DMA_Abort_IT(&hdma_sdio);
HAL_DMA_DeInit(&hdma_sdio);
return false;
}
}
while (__HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TC_FLAG_INDEX(&hdma_sdio)) != 0
|| __HAL_DMA_GET_FLAG(&hdma_sdio, __HAL_DMA_GET_TE_FLAG_INDEX(&hdma_sdio)) != 0) { /* nada */ }
HAL_DMA_Abort_IT(&hdma_sdio);
HAL_DMA_DeInit(&hdma_sdio);
timeout = millis() + 500;
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) if (ELAPSED(millis(), timeout)) return false;
return true;
return (sd_state == HAL_OK) ? true : false;
}
bool SDIO_ReadBlock(uint32_t block, uint8_t *dst) {
uint8_t retries = SDIO_READ_RETRIES;
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, nullptr, dst)) return true;
return false;
uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER) {
if (HAL_GetTick() >= timeout) return false;
}
waitingRxCplt = 1;
if (HAL_SD_ReadBlocks_DMA(&hsd, (uint8_t *)dst, block, 1) != HAL_OK)
return false;
timeout = HAL_GetTick() + SD_TIMEOUT;
while (waitingRxCplt)
if (HAL_GetTick() >= timeout) return false;
return true;
}
bool SDIO_WriteBlock(uint32_t block, const uint8_t *src) {
uint8_t retries = SDIO_READ_RETRIES;
while (retries--) if (SDIO_ReadWriteBlock_DMA(block, src, nullptr)) return true;
return false;
uint32_t timeout = HAL_GetTick() + SD_TIMEOUT;
while (HAL_SD_GetCardState(&hsd) != HAL_SD_CARD_TRANSFER)
if (HAL_GetTick() >= timeout) return false;
waitingTxCplt = 1;
if (HAL_SD_WriteBlocks_DMA(&hsd, (uint8_t *)src, block, 1) != HAL_OK)
return false;
timeout = HAL_GetTick() + SD_TIMEOUT;
while (waitingTxCplt)
if (HAL_GetTick() >= timeout) return false;
return true;
}
bool SDIO_IsReady() {
@ -305,16 +264,5 @@ uint32_t SDIO_GetCardSize() {
return (uint32_t)(hsd.SdCard.BlockNbr) * (hsd.SdCard.BlockSize);
}
#if defined(STM32F1xx)
#define DMA_IRQ_HANDLER DMA2_Channel4_5_IRQHandler
#elif defined(STM32F4xx)
#define DMA_IRQ_HANDLER DMA2_Stream3_IRQHandler
#else
#error "Unknown STM32 architecture."
#endif
extern "C" void SDIO_IRQHandler(void) { HAL_SD_IRQHandler(&hsd); }
extern "C" void DMA_IRQ_HANDLER(void) { HAL_DMA_IRQHandler(&hdma_sdio); }
#endif // SDIO_SUPPORT
#endif // HAL_STM32

2
Marlin/src/core/boards.h
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@ -429,6 +429,8 @@
#define BOARD_T41U5XBB 5002 // T41U5XBB Teensy 4.1 breakout board
#define BOARD_NUCLEO_F767ZI 5003 // ST NUCLEO-F767ZI Dev Board
#define BOARD_BTT_SKR_SE_BX 5004 // BigTreeTech SKR SE BX (STM32H743II)
#define BOARD_BTT_SKR_V3_0 5005 // BigTreeTech SKR V3.0 (STM32H743VG)
#define BOARD_BTT_SKR_V3_0_EZ 5006 // BigTreeTech SKR V3.0 EZ (STM32H743VG)
//
// Espressif ESP32 WiFi

4
Marlin/src/pins/pins.h
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@ -708,6 +708,10 @@
#include "stm32f7/pins_NUCLEO_F767ZI.h" // STM32F7 env:NUCLEO_F767ZI
#elif MB(BTT_SKR_SE_BX)
#include "stm32h7/pins_BTT_SKR_SE_BX.h" // STM32H7 env:BTT_SKR_SE_BX
#elif MB(BTT_SKR_V3_0)
#include "stm32h7/pins_BTT_SKR_V3_0.h" // STM32H7 env:STM32H743Vx_btt
#elif MB(BTT_SKR_V3_0_EZ)
#include "stm32h7/pins_BTT_SKR_V3_0_EZ.h" // STM32H7 env:STM32H743Vx_btt
#elif MB(TEENSY41)
#include "teensy4/pins_TEENSY41.h" // Teensy-4.x env:teensy41
#elif MB(T41U5XBB)

26
Marlin/src/pins/stm32h7/pins_BTT_SKR_V3_0.h Normal file
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@ -0,0 +1,26 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2022 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#pragma once
#define BOARD_INFO_NAME "BTT SKR V3"
#include "pins_BTT_SKR_V3_0_common.h"

26
Marlin/src/pins/stm32h7/pins_BTT_SKR_V3_0_EZ.h Normal file
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@ -0,0 +1,26 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2022 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#pragma once
#define BOARD_INFO_NAME "BTT SKR V3 EZ"
#include "pins_BTT_SKR_V3_0_common.h"

569
Marlin/src/pins/stm32h7/pins_BTT_SKR_V3_0_common.h Normal file
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@ -0,0 +1,569 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2022 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#pragma once
#if NOT_TARGET(STM32H7)
#error "Oops! Select an STM32H7 board in 'Tools > Board.'"
#endif
// If you have the BigTreeTech driver expansion module, enable BTT_MOTOR_EXPANSION
// https://github.com/bigtreetech/BTT-Expansion-module/tree/master/BTT%20EXP-MOT
//#define BTT_MOTOR_EXPANSION
#if BOTH(HAS_WIRED_LCD, BTT_MOTOR_EXPANSION)
#if EITHER(CR10_STOCKDISPLAY, ENDER2_STOCKDISPLAY)
#define EXP_MOT_USE_EXP2_ONLY 1
#else
#error "You can't use both an LCD and a Motor Expansion Module on EXP1/EXP2 at the same time."
#endif
#endif
#define USES_DIAG_JUMPERS
// Onboard I2C EEPROM
#if EITHER(NO_EEPROM_SELECTED, I2C_EEPROM)
#undef NO_EEPROM_SELECTED
#define I2C_EEPROM
#define SOFT_I2C_EEPROM // Force the use of Software I2C
#define I2C_SCL_PIN PA14
#define I2C_SDA_PIN PA13
#define MARLIN_EEPROM_SIZE 0x1000 // 4KB
#endif
//
// Servos
//
#define SERVO0_PIN PE5
//
// Trinamic Stallguard pins
//
#define X_DIAG_PIN PC1 // X-STOP
#define Y_DIAG_PIN PC3 // Y-STOP
#define Z_DIAG_PIN PC0 // Z-STOP
#define E0_DIAG_PIN PC2 // E0DET
#define E1_DIAG_PIN PA0 // E1DET
//
// Limit Switches
//
#ifdef X_STALL_SENSITIVITY
#define X_STOP_PIN X_DIAG_PIN
#if X_HOME_TO_MIN
#define X_MAX_PIN PC2 // E0DET
#else
#define X_MIN_PIN PC2 // E0DET
#endif
#elif ENABLED(X_DUAL_ENDSTOPS)
#ifndef X_MIN_PIN
#define X_MIN_PIN PC1 // X-STOP
#endif
#ifndef X_MAX_PIN
#define X_MAX_PIN PC2 // E0DET
#endif
#else
#define X_STOP_PIN PC1 // X-STOP
#endif
#ifdef Y_STALL_SENSITIVITY
#define Y_STOP_PIN Y_DIAG_PIN
#if Y_HOME_TO_MIN
#define Y_MAX_PIN PA0 // E1DET
#else
#define Y_MIN_PIN PA0 // E1DET
#endif
#elif ENABLED(Y_DUAL_ENDSTOPS)
#ifndef Y_MIN_PIN
#define Y_MIN_PIN PC3 // Y-STOP
#endif
#ifndef Y_MAX_PIN
#define Y_MAX_PIN PA0 // E1DET
#endif
#else
#define Y_STOP_PIN PC3 // Y-STOP
#endif
#ifdef Z_STALL_SENSITIVITY
#define Z_STOP_PIN Z_DIAG_PIN
#if Z_HOME_TO_MIN
#define Z_MAX_PIN PC15 // PWRDET
#else
#define Z_MIN_PIN PC15 // PWRDET
#endif
#elif ENABLED(Z_MULTI_ENDSTOPS)
#ifndef Z_MIN_PIN
#define Z_MIN_PIN PC0 // Z-STOP
#endif
#ifndef Z_MAX_PIN
#define Z_MAX_PIN PC15 // PWRDET
#endif
#else
#ifndef Z_STOP_PIN
#define Z_STOP_PIN PC0 // Z-STOP
#endif
#endif
//
// Z Probe (when not Z_MIN_PIN)
//
#ifndef Z_MIN_PROBE_PIN
#define Z_MIN_PROBE_PIN PC13
#endif
//
// Probe enable
//
#if ENABLED(PROBE_ENABLE_DISABLE)
#ifndef PROBE_ENABLE_PIN
#define PROBE_ENABLE_PIN SERVO0_PIN
#endif
#endif
//
// Filament Runout Sensor
//
#define FIL_RUNOUT_PIN PC2 // E0DET
#define FIL_RUNOUT2_PIN PA0 // E1DET
//
// Power Supply Control
//
#ifndef PS_ON_PIN
#define PS_ON_PIN PE4 // PS-ON
#endif
//
// Power Loss Detection
//
#ifndef POWER_LOSS_PIN
#define POWER_LOSS_PIN PC15 // PWRDET
#endif
//
// Steppers
//
#define X_STEP_PIN PD4
#define X_DIR_PIN PD3
#define X_ENABLE_PIN PD6
#ifndef X_CS_PIN
#define X_CS_PIN PD5
#endif
#define Y_STEP_PIN PA15
#define Y_DIR_PIN PA8
#define Y_ENABLE_PIN PD1
#ifndef Y_CS_PIN
#define Y_CS_PIN PD0
#endif
#define Z_STEP_PIN PE2
#define Z_DIR_PIN PE3
#define Z_ENABLE_PIN PE0
#ifndef Z_CS_PIN
#define Z_CS_PIN PE1
#endif
#ifndef E0_STEP_PIN
#define E0_STEP_PIN PD15
#endif
#ifndef E0_DIR_PIN
#define E0_DIR_PIN PD14
#endif
#ifndef E0_ENABLE_PIN
#define E0_ENABLE_PIN PC7
#endif
#ifndef E0_CS_PIN
#define E0_CS_PIN PC6
#endif
#ifndef E1_STEP_PIN
#define E1_STEP_PIN PD11
#endif
#ifndef E1_DIR_PIN
#define E1_DIR_PIN PD10
#endif
#ifndef E1_ENABLE_PIN
#define E1_ENABLE_PIN PD13
#endif
#ifndef E1_CS_PIN
#define E1_CS_PIN PD12
#endif
//
// Temperature Sensors
//
#ifndef TEMP_0_PIN
#define TEMP_0_PIN PA2 // TH0
#endif
#ifndef TEMP_1_PIN
#define TEMP_1_PIN PA3 // TH1
#endif
#ifndef TEMP_BED_PIN
#define TEMP_BED_PIN PA1 // TB
#endif
#if HOTENDS == 1 && DISABLED(HEATERS_PARALLEL)
#if TEMP_SENSOR_PROBE
#define TEMP_PROBE_PIN TEMP_1_PIN
#elif TEMP_SENSOR_CHAMBER
#define TEMP_CHAMBER_PIN TEMP_1_PIN
#endif
#endif
//
// Heaters / Fans
//
#ifndef HEATER_0_PIN
#define HEATER_0_PIN PB3 // Heater0
#endif
#ifndef HEATER_1_PIN
#define HEATER_1_PIN PB4 // Heater1
#endif
#ifndef HEATER_BED_PIN
#define HEATER_BED_PIN PD7 // Hotbed
#endif
#ifndef FAN_PIN
#define FAN_PIN PB7 // Fan0
#endif
#if HAS_CUTTER
#ifndef SPINDLE_LASER_PWM_PIN
#define SPINDLE_LASER_PWM_PIN PB5
#endif
#ifndef SPINDLE_LASER_ENA_PIN
#define SPINDLE_LASER_ENA_PIN PB6
#endif
#else
#ifndef FAN1_PIN
#define FAN1_PIN PB6 // Fan1
#endif
#ifndef FAN2_PIN
#define FAN2_PIN PB5 // Fan2
#endif
#endif // SPINDLE_FEATURE || LASER_FEATURE
//
// Software SPI pins for TMC2130 stepper drivers
//
#if ENABLED(TMC_USE_SW_SPI)
#ifndef TMC_SW_MOSI
#define TMC_SW_MOSI PE13
#endif
#ifndef TMC_SW_MISO
#define TMC_SW_MISO PE15
#endif
#ifndef TMC_SW_SCK
#define TMC_SW_SCK PE14
#endif
#endif
#if HAS_TMC_UART
/**
* TMC2208/TMC2209 stepper drivers
*
* Hardware serial communication ports.
* If undefined software serial is used according to the pins below
*/
//#define X_HARDWARE_SERIAL Serial1
//#define X2_HARDWARE_SERIAL Serial1
//#define Y_HARDWARE_SERIAL Serial1
//#define Y2_HARDWARE_SERIAL Serial1
//#define Z_HARDWARE_SERIAL Serial1
//#define Z2_HARDWARE_SERIAL Serial1
//#define E0_HARDWARE_SERIAL Serial1
//#define E1_HARDWARE_SERIAL Serial1
//#define E2_HARDWARE_SERIAL Serial1
//#define E3_HARDWARE_SERIAL Serial1
//#define E4_HARDWARE_SERIAL Serial1
//
// Software serial
//
#define X_SERIAL_TX_PIN PD5
#define X_SERIAL_RX_PIN X_SERIAL_TX_PIN
#define Y_SERIAL_TX_PIN PD0
#define Y_SERIAL_RX_PIN Y_SERIAL_TX_PIN
#define Z_SERIAL_TX_PIN PE1
#define Z_SERIAL_RX_PIN Z_SERIAL_TX_PIN
#define E0_SERIAL_TX_PIN PC6
#define E0_SERIAL_RX_PIN E0_SERIAL_TX_PIN
#define E1_SERIAL_TX_PIN PD12
#define E1_SERIAL_RX_PIN E1_SERIAL_TX_PIN
// Reduce baud rate to improve software serial reliability
#define TMC_BAUD_RATE 19200
#endif
//
// SD Connection
//
#ifndef SDCARD_CONNECTION
#define SDCARD_CONNECTION ONBOARD
#endif
/**
* ------ ------
* (BEEPER) PC5 |10 9 | PB0 (BTN_ENC) (MISO) PA6 |10 9 | PA5 (SCK)
* (LCD_EN) PB1 | 8 7 | PE8 (LCD_RS) (BTN_EN1) PE7 | 8 7 | PA4 (SD_SS)
* (LCD_D4) PE9 | 6 5 PE10 (LCD_D5) (BTN_EN2) PB2 | 6 5 PA7 (MOSI)
* (LCD_D6) PE11 | 4 3 | PE12 (LCD_D7) (SD_DETECT) PC4 | 4 3 | RESET
* GND | 2 1 | 5V GND | 2 1 | --
* ------ ------
* EXP1 EXP2
*/
#define EXP1_03_PIN PE12
#define EXP1_04_PIN PE11
#define EXP1_05_PIN PE10
#define EXP1_06_PIN PE9
#define EXP1_07_PIN PE8
#define EXP1_08_PIN PB1
#define EXP1_09_PIN PB0
#define EXP1_10_PIN PC5
#define EXP2_03_PIN -1
#define EXP2_04_PIN PC4
#define EXP2_05_PIN PA7
#define EXP2_06_PIN PB2
#define EXP2_07_PIN PA4
#define EXP2_08_PIN PE7
#define EXP2_09_PIN PA5
#define EXP2_10_PIN PA6
//
// Onboard SD card
// Must use soft SPI because Marlin's default hardware SPI is tied to LCD's EXP2
//
#if SD_CONNECTION_IS(LCD)
#define SDSS EXP2_07_PIN
#define SD_SS_PIN SDSS
#define SD_SCK_PIN EXP2_09_PIN
#define SD_MISO_PIN EXP2_10_PIN
#define SD_MOSI_PIN EXP2_05_PIN
#define SD_DETECT_PIN EXP2_04_PIN
#elif SD_CONNECTION_IS(ONBOARD)
#define SDIO_SUPPORT
#define SDIO_CLOCK 24000000 // 24MHz
#elif SD_CONNECTION_IS(CUSTOM_CABLE)
#error "No custom SD drive cable defined for this board."
#endif
#if ENABLED(BTT_MOTOR_EXPANSION)
/** ----- -----
* -- | . . | GND -- | . . | GND
* -- | . . | M1EN M2EN | . . | M3EN
* M1STP | . . M1DIR M1RX | . . M1DIAG
* M2DIR | . . | M2STP M2RX | . . | M2DIAG
* M3DIR | . . | M3STP M3RX | . . | M3DIAG
* ----- -----
* EXP2 EXP1
*
* NB In EXP_MOT_USE_EXP2_ONLY mode EXP1 is not used and M2EN and M3EN need to be jumpered to M1EN
*/
// M1 on Driver Expansion Module
#define E2_STEP_PIN EXP2_05_PIN
#define E2_DIR_PIN EXP2_06_PIN
#define E2_ENABLE_PIN EXP2_04_PIN
#if !EXP_MOT_USE_EXP2_ONLY
#define E2_DIAG_PIN EXP1_06_PIN
#define E2_CS_PIN EXP1_05_PIN
#if HAS_TMC_UART
#define E2_SERIAL_TX_PIN EXP1_05_PIN
#define E2_SERIAL_RX_PIN EXP1_05_PIN
#endif
#endif
// M2 on Driver Expansion Module
#define E3_STEP_PIN EXP2_08_PIN
#define E3_DIR_PIN EXP2_07_PIN
#if !EXP_MOT_USE_EXP2_ONLY
#define E3_ENABLE_PIN EXP1_03_PIN
#define E3_DIAG_PIN EXP1_08_PIN
#define E3_CS_PIN EXP1_07_PIN
#if HAS_TMC_UART
#define E3_SERIAL_TX_PIN EXP1_07_PIN
#define E3_SERIAL_RX_PIN EXP1_07_PIN
#endif
#else
#define E3_ENABLE_PIN EXP2_04_PIN
#endif
// M3 on Driver Expansion Module
#define E4_STEP_PIN EXP2_10_PIN
#define E4_DIR_PIN EXP2_09_PIN
#if !EXP_MOT_USE_EXP2_ONLY
#define E4_ENABLE_PIN EXP1_04_PIN
#define E4_DIAG_PIN EXP1_10_PIN
#define E4_CS_PIN EXP1_09_PIN
#if HAS_TMC_UART
#define E4_SERIAL_TX_PIN EXP1_09_PIN
#define E4_SERIAL_RX_PIN EXP1_09_PIN
#endif
#else
#define E4_ENABLE_PIN EXP2_04_PIN
#endif
#endif // BTT_MOTOR_EXPANSION
//
// LCDs and Controllers
//
#if IS_TFTGLCD_PANEL
#if ENABLED(TFTGLCD_PANEL_SPI)
#define TFTGLCD_CS EXP2_08_PIN
#endif
#elif HAS_WIRED_LCD
#define BEEPER_PIN EXP1_10_PIN
#define BTN_ENC EXP1_09_PIN
#if ENABLED(CR10_STOCKDISPLAY)
#define LCD_PINS_RS EXP1_04_PIN
#define BTN_EN1 EXP1_08_PIN
#define BTN_EN2 EXP1_06_PIN
#define LCD_PINS_ENABLE EXP1_03_PIN
#define LCD_PINS_D4 EXP1_05_PIN
#elif ENABLED(MKS_MINI_12864)
#define DOGLCD_A0 EXP1_04_PIN
#define DOGLCD_CS EXP1_05_PIN
#define BTN_EN1 EXP2_08_PIN
#define BTN_EN2 EXP2_06_PIN
#else
#define LCD_PINS_RS EXP1_07_PIN
#define BTN_EN1 EXP2_08_PIN
#define BTN_EN2 EXP2_06_PIN
#define LCD_PINS_ENABLE EXP1_08_PIN
#define LCD_PINS_D4 EXP1_06_PIN
#if ENABLED(FYSETC_MINI_12864)
#define DOGLCD_CS EXP1_08_PIN
#define DOGLCD_A0 EXP1_07_PIN
//#define LCD_BACKLIGHT_PIN -1
#define LCD_RESET_PIN EXP1_06_PIN // Must be high or open for LCD to operate normally.
#if EITHER(FYSETC_MINI_12864_1_2, FYSETC_MINI_12864_2_0)
#ifndef RGB_LED_R_PIN
#define RGB_LED_R_PIN EXP1_05_PIN
#endif
#ifndef RGB_LED_G_PIN
#define RGB_LED_G_PIN EXP1_04_PIN
#endif
#ifndef RGB_LED_B_PIN
#define RGB_LED_B_PIN EXP1_03_PIN
#endif
#elif ENABLED(FYSETC_MINI_12864_2_1)
#define NEOPIXEL_PIN EXP1_05_PIN
#endif
#endif // !FYSETC_MINI_12864
#if IS_ULTIPANEL
#define LCD_PINS_D5 EXP1_05_PIN
#define LCD_PINS_D6 EXP1_04_PIN
#define LCD_PINS_D7 EXP1_03_PIN
#if ENABLED(REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER)
#define BTN_ENC_EN LCD_PINS_D7 // Detect the presence of the encoder
#endif
#endif
#endif
#endif // HAS_WIRED_LCD
// Alter timing for graphical display
#if IS_U8GLIB_ST7920
#ifndef BOARD_ST7920_DELAY_1
#define BOARD_ST7920_DELAY_1 120
#endif
#ifndef BOARD_ST7920_DELAY_2
#define BOARD_ST7920_DELAY_2 80
#endif
#ifndef BOARD_ST7920_DELAY_3
#define BOARD_ST7920_DELAY_3 580
#endif
#endif
#if HAS_SPI_TFT
//
// e.g., BTT_TFT35_SPI_V1_0 (480x320, 3.5", SPI Stock Display with Rotary Encoder in BIQU B1 SE)
//
#define TFT_CS_PIN EXP2_07_PIN
#define TFT_A0_PIN EXP2_04_PIN
#define TFT_SCK_PIN EXP2_09_PIN
#define TFT_MISO_PIN EXP2_10_PIN
#define TFT_MOSI_PIN EXP2_05_PIN
#define TOUCH_INT_PIN EXP1_04_PIN
#define TOUCH_MISO_PIN EXP1_05_PIN
#define TOUCH_MOSI_PIN EXP1_08_PIN
#define TOUCH_SCK_PIN EXP1_06_PIN
#define TOUCH_CS_PIN EXP1_07_PIN
#define BTN_EN1 EXP2_08_PIN
#define BTN_EN2 EXP2_06_PIN
#define BTN_ENC EXP1_09_PIN
#endif
//
// NeoPixel LED
//
#ifndef NEOPIXEL_PIN
#define NEOPIXEL_PIN PE6
#endif
//
// WIFI
//
/**
* -------
* GND | 9 | | 8 | 3.3V
* (ESP-CS) PB12 | 10 | | 7 | PB15 (ESP-MOSI)
* 3.3V | 11 | | 6 | PB14 (ESP-MISO)
* (ESP-IO0) PB10 | 12 | | 5 | PB13 (ESP-CLK)
* (ESP-IO4) PB11 | 13 | | 4 | --
* -- | 14 | | 3 | 3.3V (ESP-EN)
* (ESP-RX) PD8 | 15 | | 2 | --
* (ESP-TX) PD9 | 16 | | 1 | PC14 (ESP-RST)
* -------
* WIFI
*/
#define ESP_WIFI_MODULE_COM 3 // Must also set either SERIAL_PORT or SERIAL_PORT_2 to this
#define ESP_WIFI_MODULE_BAUDRATE BAUDRATE // Must use same BAUDRATE as SERIAL_PORT & SERIAL_PORT_2
#define ESP_WIFI_MODULE_RESET_PIN PC14
#define ESP_WIFI_MODULE_GPIO0_PIN PB10
#define ESP_WIFI_MODULE_GPIO4_PIN PB11