Drop 'register' storage specifier
This commit is contained in:
@ -36,9 +36,9 @@
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// D C B A is longIn2
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//
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static FORCE_INLINE uint16_t MultiU24X32toH16(uint32_t longIn1, uint32_t longIn2) {
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register uint8_t tmp1;
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register uint8_t tmp2;
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register uint16_t intRes;
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uint8_t tmp1;
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uint8_t tmp2;
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uint16_t intRes;
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__asm__ __volatile__(
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A("clr %[tmp1]")
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A("mul %A[longIn1], %B[longIn2]")
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@ -90,8 +90,8 @@ static FORCE_INLINE uint16_t MultiU24X32toH16(uint32_t longIn1, uint32_t longIn2
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// r26 to store 0
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// r27 to store the byte 1 of the 24 bit result
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static FORCE_INLINE uint16_t MultiU16X8toH16(uint8_t charIn1, uint16_t intIn2) {
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register uint8_t tmp;
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register uint16_t intRes;
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uint8_t tmp;
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uint16_t intRes;
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__asm__ __volatile__ (
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A("clr %[tmp]")
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A("mul %[charIn1], %B[intIn2]")
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@ -78,11 +78,11 @@
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// run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
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static uint8_t spiTransferTx0(uint8_t bout) { // using Mode 0
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register uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
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register uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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register uint32_t idx = 0;
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uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
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uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
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uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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uint32_t idx = 0;
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/* Negate bout, as the assembler requires a negated value */
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bout = ~bout;
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@ -161,11 +161,11 @@
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// run at ~8 .. ~10Mhz - Rx version (Tx line not altered)
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static uint8_t spiTransferRx0(uint8_t bout) { // using Mode 0
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register uint32_t bin = 0;
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register uint32_t work = 0;
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register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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uint32_t bin = 0;
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uint32_t work = 0;
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uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
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uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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UNUSED(bout);
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/* The software SPI routine */
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@ -281,12 +281,12 @@
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// Block transfers run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
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static void spiTxBlock0(const uint8_t* ptr, uint32_t todo) {
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register uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
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register uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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register uint32_t work = 0;
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register uint32_t txval = 0;
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uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
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uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
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uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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uint32_t work = 0;
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uint32_t txval = 0;
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/* The software SPI routine */
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__asm__ __volatile__(
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@ -360,11 +360,11 @@
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}
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static void spiRxBlock0(uint8_t* ptr, uint32_t todo) {
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register uint32_t bin = 0;
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register uint32_t work = 0;
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register uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
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register uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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register uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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uint32_t bin = 0;
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uint32_t work = 0;
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uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
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uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
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uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
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/* The software SPI routine */
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__asm__ __volatile__(
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@ -156,7 +156,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
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return 0;
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}
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register uint8_t *ptr = (uint8_t *)arg_ptr;
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uint8_t *ptr = (uint8_t *)arg_ptr;
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while (arg_val > 0) {
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if (u8g_i2c_send_byte(*ptr++) == 0) {
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u8g_i2c_stop();
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@ -175,7 +175,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
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return 0;
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}
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register uint8_t *ptr = (uint8_t *)arg_ptr;
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uint8_t *ptr = (uint8_t *)arg_ptr;
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while (arg_val > 0) {
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if (u8g_i2c_send_byte(u8g_pgm_read(ptr)) == 0)
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return 0;
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@ -214,7 +214,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
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if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
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return u8g_i2c_stop_sw(), 0;
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register uint8_t *ptr = (uint8_t *)arg_ptr;
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uint8_t *ptr = (uint8_t *)arg_ptr;
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while (arg_val > 0) {
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if (u8g_i2c_send_byte_sw(*ptr++) == 0)
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return u8g_i2c_stop_sw(), 0;
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@ -229,7 +229,7 @@ uint8_t u8g_com_HAL_LPC1768_ssd_sw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
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if (u8g_com_ssd_I2C_start_sequence_sw(u8g) == 0)
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return u8g_i2c_stop_sw(), 0;
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register uint8_t *ptr = (uint8_t *)arg_ptr;
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uint8_t *ptr = (uint8_t *)arg_ptr;
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while (arg_val > 0) {
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if (u8g_i2c_send_byte_sw(u8g_pgm_read(ptr)) == 0) return 0;
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ptr++;
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