Update USB_FLASH_DRIVE_SUPPORT (#15021)
This commit is contained in:
Marcio Teixeira
committed by
Scott Lahteine
Scott Lahteine
parent
20fc66f875
commit
da601d5114
213
Marlin/src/sd/usb_flashdrive/lib-uhs2/usbhost.cpp
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213
Marlin/src/sd/usb_flashdrive/lib-uhs2/usbhost.cpp
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/****************
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* usb_host.cpp *
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****************/
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/****************************************************************************
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* Written By Marcio Teixeira 2018 - Aleph Objects, Inc. *
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* *
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* This program is free software: you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation, either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* To view a copy of the GNU General Public License, go to the following *
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* location: <http://www.gnu.org/licenses/>. *
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****************************************************************************/
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/* What follows is a modified version of the MAX3421e originally defined in
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* lib/usbhost.c". This has been rewritten to use SPI routines from the
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* Marlin HAL */
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#include "../../../inc/MarlinConfigPre.h"
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#if ENABLED(USB_FLASH_DRIVE_SUPPORT) && DISABLED(USE_UHS3_USB)
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#include "Usb.h"
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#include "usbhost.h"
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uint8_t MAX3421e::vbusState = 0;
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// constructor
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void MAX3421e::cs() {
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WRITE(USB_CS_PIN,0);
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}
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void MAX3421e::ncs() {
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WRITE(USB_CS_PIN,1);
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}
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// write single byte into MAX3421 register
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void MAX3421e::regWr(uint8_t reg, uint8_t data) {
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cs();
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spiSend(reg | 0x02);
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spiSend(data);
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ncs();
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};
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// multiple-byte write
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// return a pointer to memory position after last written
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uint8_t* MAX3421e::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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cs();
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spiSend(reg | 0x02);
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while (nbytes--) spiSend(*data_p++);
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ncs();
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return data_p;
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}
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// GPIO write
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// GPIO byte is split between 2 registers, so two writes are needed to write one byte
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// GPOUT bits are in the low nybble. 0-3 in IOPINS1, 4-7 in IOPINS2
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void MAX3421e::gpioWr(uint8_t data) {
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regWr(rIOPINS1, data);
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regWr(rIOPINS2, data >> 4);
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}
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// single host register read
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uint8_t MAX3421e::regRd(uint8_t reg) {
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cs();
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spiSend(reg);
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uint8_t rv = spiRec();
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ncs();
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return rv;
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}
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// multiple-byte register read
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// return a pointer to a memory position after last read
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uint8_t* MAX3421e::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
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cs();
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spiSend(reg);
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while (nbytes--) *data_p++ = spiRec();
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ncs();
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return data_p;
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}
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// GPIO read. See gpioWr for explanation
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// GPIN pins are in high nybbles of IOPINS1, IOPINS2
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uint8_t MAX3421e::gpioRd() {
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return (regRd(rIOPINS2) & 0xf0) | // pins 4-7, clean lower nybble
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(regRd(rIOPINS1) >> 4); // shift low bits and OR with upper from previous operation.
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}
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// reset MAX3421e. Returns false if PLL failed to stabilize 1 second after reset
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bool MAX3421e::reset() {
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regWr(rUSBCTL, bmCHIPRES);
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regWr(rUSBCTL, 0x00);
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for (uint8_t i = 100; i--;) {
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if (regRd(rUSBIRQ) & bmOSCOKIRQ) return true;
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delay(10);
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}
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return false;
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}
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// initialize MAX3421e. Set Host mode, pullups, and stuff. Returns 0 if success, -1 if not
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bool MAX3421e::start() {
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// Initialize pins and SPI bus
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SET_OUTPUT(USB_CS_PIN);
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SET_INPUT_PULLUP(USB_INTR_PIN);
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ncs();
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spiBegin();
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spiInit(
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#ifdef SPI_SPEED
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SPI_SPEED
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#else
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SPI_FULL_SPEED
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#endif
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);
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// MAX3421e - full-duplex, level interrupt, vbus off.
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regWr(rPINCTL, (bmFDUPSPI | bmINTLEVEL | GPX_VBDET));
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const uint8_t revision = regRd(rREVISION);
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if (revision == 0x00 || revision == 0xFF) {
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SERIAL_ECHOLNPAIR("Revision register appears incorrect on MAX3421e initialization. Got ", revision);
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return false;
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}
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if (!reset()) {
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SERIAL_ECHOLNPGM("OSCOKIRQ hasn't asserted in time");
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return false;
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}
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// Delay a minimum of 1 second to ensure any capacitors are drained.
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// 1 second is required to make sure we do not smoke a Microdrive!
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delay(1000);
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regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); // set pull-downs, Host
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regWr(rHIEN, bmCONDETIE | bmFRAMEIE); // connection detection
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// check if device is connected
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regWr(rHCTL, bmSAMPLEBUS); // sample USB bus
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while (!(regRd(rHCTL) & bmSAMPLEBUS)) delay(10); // wait for sample operation to finish
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busprobe(); // check if anything is connected
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regWr(rHIRQ, bmCONDETIRQ); // clear connection detect interrupt
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regWr(rCPUCTL, 0x01); // enable interrupt pin
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// GPX pin on. This is done here so that busprobe will fail if we have a switch connected.
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regWr(rPINCTL, bmFDUPSPI | bmINTLEVEL);
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return true;
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}
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// Probe bus to determine device presence and speed. Switch host to this speed.
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void MAX3421e::busprobe() {
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// Switch on just the J & K bits
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switch (regRd(rHRSL) & (bmJSTATUS | bmKSTATUS)) {
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case bmJSTATUS:
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if ((regRd(rMODE) & bmLOWSPEED) == 0) {
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regWr(rMODE, MODE_FS_HOST); // start full-speed host
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vbusState = FSHOST;
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}
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else {
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regWr(rMODE, MODE_LS_HOST); // start low-speed host
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vbusState = LSHOST;
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}
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break;
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case bmKSTATUS:
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if ((regRd(rMODE) & bmLOWSPEED) == 0) {
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regWr(rMODE, MODE_LS_HOST); // start low-speed host
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vbusState = LSHOST;
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}
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else {
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regWr(rMODE, MODE_FS_HOST); // start full-speed host
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vbusState = FSHOST;
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}
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break;
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case bmSE1: // illegal state
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vbusState = SE1;
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break;
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case bmSE0: // disconnected state
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regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST | bmSEPIRQ);
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vbusState = SE0;
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break;
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}
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}
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// MAX3421 state change task and interrupt handler
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uint8_t MAX3421e::Task(void) {
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return READ(USB_INTR_PIN) ? 0 : IntHandler();
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}
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uint8_t MAX3421e::IntHandler() {
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uint8_t HIRQ = regRd(rHIRQ), // determine interrupt source
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HIRQ_sendback = 0x00;
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if (HIRQ & bmCONDETIRQ) {
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busprobe();
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HIRQ_sendback |= bmCONDETIRQ;
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}
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// End HIRQ interrupts handling, clear serviced IRQs
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regWr(rHIRQ, HIRQ_sendback);
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return HIRQ_sendback;
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}
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#endif // USB_FLASH_DRIVE_SUPPORT
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