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Prefix SD SPI pins (SCK, MISO, MOSI, SS) (#20606)

Browse Source 
Co-authored-by: Scott Lahteine <thinkyhead@users.noreply.github.com>
This commit is contained in:
Victor Oliveira
2021-01-01 17:31:15 -03:00
committed by GitHub
parent b530db948e
commit c840bbc970
109 changed files with 612 additions and 613 deletions
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88
Marlin/src/HAL/DUE/HAL_SPI.cpp
View File

@ -69,10 +69,10 @@
// run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
static uint8_t spiTransferTx0(uint8_t bout) { // using Mode 0
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(SD_MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(SD_MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SD_SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SD_SCK_PIN);
uint32_t idx = 0;
/* Negate bout, as the assembler requires a negated value */
@ -154,9 +154,9 @@
static uint8_t spiTransferRx0(uint8_t) { // using Mode 0
uint32_t bin = 0;
uint32_t work = 0;
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(SD_MISO_PIN))+0x3C, PIN_SHIFT(SD_MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SD_SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SD_SCK_PIN);
/* The software SPI routine */
__asm__ __volatile__(
@ -225,15 +225,15 @@
static uint8_t spiTransfer1(uint8_t b) { // using Mode 0
int bits = 8;
do {
WRITE(MOSI_PIN, b & 0x80);
WRITE(SD_MOSI_PIN, b & 0x80);
b <<= 1; // little setup time
WRITE(SCK_PIN, HIGH);
WRITE(SD_SCK_PIN, HIGH);
DELAY_NS(125); // 10 cycles @ 84mhz
b |= (READ(MISO_PIN) != 0);
b |= (READ(SD_MISO_PIN) != 0);
WRITE(SCK_PIN, LOW);
WRITE(SD_SCK_PIN, LOW);
DELAY_NS(125); // 10 cycles @ 84mhz
} while (--bits);
return b;
@ -245,15 +245,15 @@
static uint8_t spiTransferX(uint8_t b) { // using Mode 0
int bits = 8;
do {
WRITE(MOSI_PIN, b & 0x80);
WRITE(SD_MOSI_PIN, b & 0x80);
b <<= 1; // little setup time
WRITE(SCK_PIN, HIGH);
WRITE(SD_SCK_PIN, HIGH);
__delay_4cycles(spiDelayCyclesX4);
b |= (READ(MISO_PIN) != 0);
b |= (READ(SD_MISO_PIN) != 0);
WRITE(SCK_PIN, LOW);
WRITE(SD_SCK_PIN, LOW);
__delay_4cycles(spiDelayCyclesX4);
} while (--bits);
return b;
@ -271,10 +271,10 @@
// Block transfers run at ~8 .. ~10Mhz - Tx version (Rx data discarded)
static void spiTxBlock0(const uint8_t* ptr, uint32_t todo) {
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t MOSI_PORT_PLUS30 = ((uint32_t) PORT(SD_MOSI_PIN)) + 0x30; /* SODR of port */
uint32_t MOSI_MASK = PIN_MASK(SD_MOSI_PIN);
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SD_SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SD_SCK_PIN);
uint32_t work = 0;
uint32_t txval = 0;
@ -352,9 +352,9 @@
static void spiRxBlock0(uint8_t* ptr, uint32_t todo) {
uint32_t bin = 0;
uint32_t work = 0;
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(MISO_PIN))+0x3C, PIN_SHIFT(MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SCK_PIN);
uint32_t BITBAND_MISO_PORT = BITBAND_ADDRESS( ((uint32_t)PORT(SD_MISO_PIN))+0x3C, PIN_SHIFT(SD_MISO_PIN)); /* PDSR of port in bitband area */
uint32_t SCK_PORT_PLUS30 = ((uint32_t) PORT(SD_SCK_PIN)) + 0x30; /* SODR of port */
uint32_t SCK_MASK = PIN_MASK(SD_SCK_PIN);
/* The software SPI routine */
__asm__ __volatile__(
@ -442,22 +442,22 @@
static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;
#if MB(ALLIGATOR)
#define _SS_WRITE(S) WRITE(SS_PIN, S)
#define _SS_WRITE(S) WRITE(SD_SS_PIN, S)
#else
#define _SS_WRITE(S) NOOP
#endif
void spiBegin() {
SET_OUTPUT(SS_PIN);
SET_OUTPUT(SD_SS_PIN);
_SS_WRITE(HIGH);
SET_OUTPUT(SCK_PIN);
SET_INPUT(MISO_PIN);
SET_OUTPUT(MOSI_PIN);
SET_OUTPUT(SD_SCK_PIN);
SET_INPUT(SD_MISO_PIN);
SET_OUTPUT(SD_MOSI_PIN);
}
uint8_t spiRec() {
_SS_WRITE(LOW);
WRITE(MOSI_PIN, HIGH); // Output 1s 1
WRITE(SD_MOSI_PIN, HIGH); // Output 1s 1
uint8_t b = spiTransferRx(0xFF);
_SS_WRITE(HIGH);
return b;
@ -466,7 +466,7 @@
void spiRead(uint8_t* buf, uint16_t nbyte) {
if (nbyte) {
_SS_WRITE(LOW);
WRITE(MOSI_PIN, HIGH); // Output 1s 1
WRITE(SD_MOSI_PIN, HIGH); // Output 1s 1
spiRxBlock(buf, nbyte);
_SS_WRITE(HIGH);
}
@ -519,8 +519,8 @@
}
_SS_WRITE(HIGH);
WRITE(MOSI_PIN, HIGH);
WRITE(SCK_PIN, LOW);
WRITE(SD_MOSI_PIN, HIGH);
WRITE(SD_SCK_PIN, LOW);
}
/** Begin SPI transaction, set clock, bit order, data mode */
@ -575,20 +575,20 @@
// Configure SPI pins
PIO_Configure(
g_APinDescription[SCK_PIN].pPort,
g_APinDescription[SCK_PIN].ulPinType,
g_APinDescription[SCK_PIN].ulPin,
g_APinDescription[SCK_PIN].ulPinConfiguration);
g_APinDescription[SD_SCK_PIN].pPort,
g_APinDescription[SD_SCK_PIN].ulPinType,
g_APinDescription[SD_SCK_PIN].ulPin,
g_APinDescription[SD_SCK_PIN].ulPinConfiguration);
PIO_Configure(
g_APinDescription[MOSI_PIN].pPort,
g_APinDescription[MOSI_PIN].ulPinType,
g_APinDescription[MOSI_PIN].ulPin,
g_APinDescription[MOSI_PIN].ulPinConfiguration);
g_APinDescription[SD_MOSI_PIN].pPort,
g_APinDescription[SD_MOSI_PIN].ulPinType,
g_APinDescription[SD_MOSI_PIN].ulPin,
g_APinDescription[SD_MOSI_PIN].ulPinConfiguration);
PIO_Configure(
g_APinDescription[MISO_PIN].pPort,
g_APinDescription[MISO_PIN].ulPinType,
g_APinDescription[MISO_PIN].ulPin,
g_APinDescription[MISO_PIN].ulPinConfiguration);
g_APinDescription[SD_MISO_PIN].pPort,
g_APinDescription[SD_MISO_PIN].ulPinType,
g_APinDescription[SD_MISO_PIN].ulPin,
g_APinDescription[SD_MISO_PIN].ulPinConfiguration);
// set master mode, peripheral select, fault detection
SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
@ -606,7 +606,7 @@
WRITE(SPI_EEPROM1_CS, HIGH);
WRITE(SPI_EEPROM2_CS, HIGH);
WRITE(SPI_FLASH_CS, HIGH);
WRITE(SS_PIN, HIGH);
WRITE(SD_SS_PIN, HIGH);
OUT_WRITE(SDSS, LOW);

2
Marlin/src/HAL/DUE/inc/SanityCheck.h
View File

@ -40,7 +40,7 @@
* Usually the hardware SPI pins are only available to the LCD. This makes the DUE hard SPI used at the same time
* as the TMC2130 soft SPI the most common setup.
*/
#define _IS_HW_SPI(P) (defined(TMC_SW_##P) && (TMC_SW_##P == MOSI_PIN || TMC_SW_##P == MISO_PIN || TMC_SW_##P == SCK_PIN))
#define _IS_HW_SPI(P) (defined(TMC_SW_##P) && (TMC_SW_##P == SD_MOSI_PIN || TMC_SW_##P == SD_MISO_PIN || TMC_SW_##P == SD_SCK_PIN))
#if ENABLED(SDSUPPORT) && HAS_DRIVER(TMC2130)
#if ENABLED(TMC_USE_SW_SPI)

20
Marlin/src/HAL/DUE/spi_pins.h
View File

@ -43,22 +43,22 @@
#define SPI_PIN 87
#define SPI_CHAN 1
#endif
#define SCK_PIN 76
#define MISO_PIN 74
#define MOSI_PIN 75
#define SD_SCK_PIN 76
#define SD_MISO_PIN 74
#define SD_MOSI_PIN 75
#else
// defaults
#define DUE_SOFTWARE_SPI
#ifndef SCK_PIN
#define SCK_PIN 52
#ifndef SD_SCK_PIN
#define SD_SCK_PIN 52
#endif
#ifndef MISO_PIN
#define MISO_PIN 50
#ifndef SD_MISO_PIN
#define SD_MISO_PIN 50
#endif
#ifndef MOSI_PIN
#define MOSI_PIN 51
#ifndef SD_MOSI_PIN
#define SD_MOSI_PIN 51
#endif
#endif
/* A.28, A.29, B.21, C.26, C.29 */
#define SS_PIN SDSS
#define SD_SS_PIN SDSS