bissen21/Marlin_Firmware
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🐛 Spellcheck comments (#22496)

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codespell -q 3 --builtin=clear,rare,informal,code -S ./Marlin/src/lcd/language -L alo,amin,endcode,stdio,uint
This commit is contained in:
luzpaz
2021-08-03 20:02:34 -04:00
committed by Scott Lahteine
parent 8385be25cd
commit c612b56bc1
135 changed files with 186 additions and 186 deletions
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2
Marlin/src/HAL/STM32F1/HAL.cpp
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@ -253,7 +253,7 @@ static void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); /* Insert write key and priorty group */
(PriorityGroupTmp << 8)); /* Insert write key & priority group */
SCB->AIRCR = reg_value;
}

4
Marlin/src/HAL/STM32F1/SPI.cpp
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@ -363,8 +363,8 @@ uint16_t SPIClass::transfer16(uint16_t data) const {
/**
* Roger Clark and Victor Perez, 2015
* Performs a DMA SPI transfer with at least a receive buffer.
* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
* On exit TX buffer is not modified, and RX buffer cotains the received data.
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
* On exit TX buffer is not modified, and RX buffer contains the received data.
* Still in progress.
*/
void SPIClass::dmaTransferSet(const void *transmitBuf, void *receiveBuf) {

6
Marlin/src/HAL/STM32F1/onboard_sd.h
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@ -7,8 +7,8 @@
#pragma once
#define _DISKIO_WRITE 1 /* 1: Enable disk_write function */
#define _DISKIO_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
#define _DISKIO_ISDIO 0 /* 1: Enable iSDIO control fucntion */
#define _DISKIO_IOCTL 1 /* 1: Enable disk_ioctl function */
#define _DISKIO_ISDIO 0 /* 1: Enable iSDIO control function */
typedef unsigned char BYTE;
typedef unsigned short WORD;
@ -56,7 +56,7 @@ DRESULT disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
#define STA_NODISK 0x02 /* No medium in the drive */
#define STA_PROTECT 0x04 /* Write protected */
/* Command code for disk_ioctrl fucntion */
/* Command code for disk_ioctrl function */
/* Generic command (Used by FatFs) */
#define CTRL_SYNC 0 /* Complete pending write process (needed at _FS_READONLY == 0) */

2
Marlin/src/HAL/STM32F1/timers.h
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@ -166,7 +166,7 @@ FORCE_INLINE static void HAL_timer_set_compare(const uint8_t timer_num, const ha
case STEP_TIMER_NUM:
// NOTE: WE have set ARPE = 0, which means the Auto reload register is not preloaded
// and there is no need to use any compare, as in the timer mode used, setting ARR to the compare value
// will result in exactly the same effect, ie trigerring an interrupt, and on top, set counter to 0
// will result in exactly the same effect, ie triggering an interrupt, and on top, set counter to 0
timer_set_reload(STEP_TIMER_DEV, compare); // We reload direct ARR as needed during counting up
break;
case TEMP_TIMER_NUM: