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codespell -q 3 --builtin=clear,rare,informal,code -S ./Marlin/src/lcd/language -L alo,amin,endcode,stdio,uint
This commit is contained in:
luzpaz
2021-08-03 20:02:34 -04:00
committed by Scott Lahteine
parent 8385be25cd
commit c612b56bc1
135 changed files with 186 additions and 186 deletions
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2
Marlin/src/HAL/AVR/fastio.h
View File

@@ -284,7 +284,7 @@ enum ClockSource2 : char {
* PWM availability macros
*/
// Determine which harware PWMs are already in use
// Determine which hardware PWMs are already in use
#define _PWM_CHK_FAN_B(P) (P == E0_AUTO_FAN_PIN || P == E1_AUTO_FAN_PIN || P == E2_AUTO_FAN_PIN || P == E3_AUTO_FAN_PIN || P == E4_AUTO_FAN_PIN || P == E5_AUTO_FAN_PIN || P == E6_AUTO_FAN_PIN || P == E7_AUTO_FAN_PIN || P == CHAMBER_AUTO_FAN_PIN || P == COOLER_AUTO_FAN_PIN)
#if PIN_EXISTS(CONTROLLER_FAN)
#define PWM_CHK_FAN_B(P) (_PWM_CHK_FAN_B(P) || P == CONTROLLER_FAN_PIN)

2
Marlin/src/HAL/DUE/HAL_SPI.cpp
View File

@@ -437,7 +437,7 @@
} while (--todo);
}
// Pointers to generic functions for block tranfers
// Pointers to generic functions for block transfers
static pfnSpiTxBlock spiTxBlock = (pfnSpiTxBlock)spiTxBlockX;
static pfnSpiRxBlock spiRxBlock = (pfnSpiRxBlock)spiRxBlockX;

2
Marlin/src/HAL/DUE/usb/arduino_due_x.h
View File

@@ -71,7 +71,7 @@
/* ------------------------------------------------------------------------ */
/**
* \page arduino_due_x_board_info "Arduino Due/X - Board informations"
* \page arduino_due_x_board_info "Arduino Due/X - Board information"
* This page lists several definition related to the board description.
*
*/

6
Marlin/src/HAL/DUE/usb/udd.h
View File

@@ -90,7 +90,7 @@ typedef struct {
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
uint8_t *payload;
//! Size of buffer to send or fill, and content the number of byte transfered
//! Size of buffer to send or fill, and content the number of byte transferred
uint16_t payload_size;
//! Callback called after reception of ZLP from setup request
@@ -132,7 +132,7 @@ typedef void (*udd_callback_halt_cleared_t)(void);
*
* \param status UDD_EP_TRANSFER_OK, if transfer is complete
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
* \param n number of data transfered
* \param n number of data transferred
*/
typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
iram_size_t nb_transferred, udd_ep_id_t ep);
@@ -303,7 +303,7 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
* The driver uses a specific DMA USB to transfer data
* from internal RAM to endpoint, if this one is available.
* When the transfer is finished or aborted (stall, reset, ...), the \a callback is called.
* The \a callback returns the transfer status and eventually the number of byte transfered.
* The \a callback returns the transfer status and eventually the number of byte transferred.
* Note: The control endpoint is not authorized.
*
* \param ep The ID of the endpoint to use

4
Marlin/src/HAL/DUE/usb/udi_cdc.c
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@@ -162,7 +162,7 @@ static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep);
*
* \param status UDD_EP_TRANSFER_OK, if transfer finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param n number of data transfered
* \param n number of data transferred
*/
static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep);
@@ -200,7 +200,7 @@ static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_
*
* \param status UDD_EP_TRANSFER_OK, if transfer finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param n number of data transfered
* \param n number of data transferred
*/
static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep);

2
Marlin/src/HAL/DUE/usb/udi_cdc_conf.h
View File

@@ -106,7 +106,7 @@ extern "C" {
*/
//@{
# if UDI_CDC_PORT_NB > 2
# error USBB, UDP, UDPHS and UOTGHS interfaces have not enought endpoints.
# error USBB, UDP, UDPHS and UOTGHS interfaces have not enough endpoints.
# endif
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX

10
Marlin/src/HAL/DUE/usb/udi_msc.c
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@@ -173,7 +173,7 @@ static void udi_msc_cbw_wait(void);
*
* \param status UDD_EP_TRANSFER_OK, if transfer is finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
* \param nb_received number of data transfered
* \param nb_received number of data transferred
*/
static void udi_msc_cbw_received(udd_ep_status_t status,
iram_size_t nb_received, udd_ep_id_t ep);
@@ -211,7 +211,7 @@ static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size);
*
* \param status UDD_EP_TRANSFER_OK, if transfer finish
* \param status UDD_EP_TRANSFER_ABORT, if transfer aborted
* \param nb_sent number of data transfered
* \param nb_sent number of data transferred
*/
static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep);
@@ -244,7 +244,7 @@ void udi_msc_csw_send(void);
*
* \param status UDD_EP_TRANSFER_OK, if transfer is finished
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
* \param nb_sent number of data transfered
* \param nb_sent number of data transferred
*/
static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep);
@@ -463,7 +463,7 @@ uint8_t udi_msc_getsetting(void)
static void udi_msc_cbw_invalid(void)
{
if (!udi_msc_b_cbw_invalid)
return; // Don't re-stall endpoint if error reseted by setup
return; // Don't re-stall endpoint if error reset by setup
udd_ep_set_halt(UDI_MSC_EP_OUT);
// If stall cleared then re-stall it. Only Setup MSC Reset can clear it
udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid);
@@ -472,7 +472,7 @@ static void udi_msc_cbw_invalid(void)
static void udi_msc_csw_invalid(void)
{
if (!udi_msc_b_cbw_invalid)
return; // Don't re-stall endpoint if error reseted by setup
return; // Don't re-stall endpoint if error reset by setup
udd_ep_set_halt(UDI_MSC_EP_IN);
// If stall cleared then re-stall it. Only Setup MSC Reset can clear it
udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid);

46
Marlin/src/HAL/DUE/usb/uotghs_device_due.c
View File

@@ -325,7 +325,7 @@ static void udd_sleep_mode(bool b_idle)
/**
* \name Control endpoint low level management routine.
*
* This function performs control endpoint mangement.
* This function performs control endpoint management.
* It handle the SETUP/DATA/HANDSHAKE phases of a control transaction.
*/
//@{
@@ -397,9 +397,9 @@ static void udd_ctrl_endofrequest(void);
/**
* \brief Main interrupt routine for control endpoint
*
* This switchs control endpoint events to correct sub function.
* This switches control endpoint events to correct sub function.
*
* \return \c 1 if an event about control endpoint is occured, otherwise \c 0.
* \return \c 1 if an event about control endpoint is occurred, otherwise \c 0.
*/
static bool udd_ctrl_interrupt(void);
@@ -410,7 +410,7 @@ static bool udd_ctrl_interrupt(void);
* \name Management of bulk/interrupt/isochronous endpoints
*
* The UDD manages the data transfer on endpoints:
* - Start data tranfer on endpoint with USB Device DMA
* - Start data transfer on endpoint with USB Device DMA
* - Send a ZLP packet if requested
* - Call callback registered to signal end of transfer
* The transfer abort and stall feature are supported.
@@ -431,7 +431,7 @@ typedef struct {
uint8_t *buf;
//! Size of buffer to send or fill
iram_size_t buf_size;
//!< Size of data transfered
//!< Size of data transferred
iram_size_t buf_cnt;
//!< Size of data loaded (or prepared for DMA) last time
iram_size_t buf_load;
@@ -486,7 +486,7 @@ static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort, uint8_t ep_n
#ifdef UDD_EP_DMA_SUPPORTED
/**
* \brief Start the next transfer if necessary or complet the job associated.
* \brief Start the next transfer if necessary or complete the job associated.
*
* \param ep endpoint number without direction flag
*/
@@ -496,9 +496,9 @@ static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort, uint8_t ep_n
/**
* \brief Main interrupt routine for bulk/interrupt/isochronous endpoints
*
* This switchs endpoint events to correct sub function.
* This switches endpoint events to correct sub function.
*
* \return \c 1 if an event about bulk/interrupt/isochronous endpoints has occured, otherwise \c 0.
* \return \c 1 if an event about bulk/interrupt/isochronous endpoints has occurred, otherwise \c 0.
*/
static bool udd_ep_interrupt(void);
@@ -520,7 +520,7 @@ static bool udd_ep_interrupt(void);
*
* Note:
* Here, the global interrupt mask is not clear when an USB interrupt is enabled
* because this one can not be occured during the USB ISR (=during INTX is masked).
* because this one can not be occurred during the USB ISR (=during INTX is masked).
* See Technical reference $3.8.3 Masking interrupt requests in peripheral modules.
*/
#ifdef UHD_ENABLE
@@ -787,7 +787,7 @@ void udd_attach(void)
udd_sleep_mode(true);
otg_unfreeze_clock();
// This section of clock check can be improved with a chek of
// This section of clock check can be improved with a check of
// USB clock source via sysclk()
// Check USB clock because the source can be a PLL
while (!Is_otg_clock_usable());
@@ -803,7 +803,7 @@ void udd_attach(void)
#ifdef USB_DEVICE_HS_SUPPORT
udd_enable_msof_interrupt();
#endif
// Reset following interupts flag
// Reset following interrupts flag
udd_ack_reset();
udd_ack_sof();
udd_ack_msof();
@@ -902,7 +902,7 @@ bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
}
dbg_print("alloc(%x, %d) ", ep, MaxEndpointSize);
// Bank choise
// Bank choice
switch (bmAttributes & USB_EP_TYPE_MASK) {
case USB_EP_TYPE_ISOCHRONOUS:
nb_bank = UDD_ISOCHRONOUS_NB_BANK(ep);
@@ -1228,7 +1228,7 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
if (Is_udd_endpoint_stall_requested(ep)
|| ptr_job->stall_requested) {
// Endpoint halted then registes the callback
// Endpoint halted then registers the callback
ptr_job->busy = true;
ptr_job->call_nohalt = callback;
} else {
@@ -1386,7 +1386,7 @@ static void udd_ctrl_setup_received(void)
// Decode setup request
if (udc_process_setup() == false) {
// Setup request unknow then stall it
// Setup request unknown then stall it
udd_ctrl_stall_data();
udd_ack_setup_received(0);
return;
@@ -1447,7 +1447,7 @@ static void udd_ctrl_in_sent(void)
udd_ctrl_prev_payload_buf_cnt += udd_ctrl_payload_buf_cnt;
if ((udd_g_ctrlreq.req.wLength == udd_ctrl_prev_payload_buf_cnt)
|| b_shortpacket) {
// All data requested are transfered or a short packet has been sent
// All data requested are transferred or a short packet has been sent
// then it is the end of data phase.
// Generate an OUT ZLP for handshake phase.
udd_ctrl_send_zlp_out();
@@ -1516,7 +1516,7 @@ static void udd_ctrl_out_received(void)
// End of SETUP request:
// - Data IN Phase aborted,
// - or last Data IN Phase hidden by ZLP OUT sending quiclky,
// - or ZLP OUT received normaly.
// - or ZLP OUT received normally.
udd_ctrl_endofrequest();
} else {
// Protocol error during SETUP request
@@ -1544,7 +1544,7 @@ static void udd_ctrl_out_received(void)
(udd_ctrl_prev_payload_buf_cnt +
udd_ctrl_payload_buf_cnt))) {
// End of reception because it is a short packet
// Before send ZLP, call intermediat calback
// Before send ZLP, call intermediate callback
// in case of data receiv generate a stall
udd_g_ctrlreq.payload_size = udd_ctrl_payload_buf_cnt;
if (NULL != udd_g_ctrlreq.over_under_run) {
@@ -1565,7 +1565,7 @@ static void udd_ctrl_out_received(void)
if (udd_g_ctrlreq.payload_size == udd_ctrl_payload_buf_cnt) {
// Overrun then request a new payload buffer
if (!udd_g_ctrlreq.over_under_run) {
// No callback availabled to request a new payload buffer
// No callback available to request a new payload buffer
udd_ctrl_stall_data();
// Ack reception of OUT to replace NAK by a STALL
udd_ack_out_received(0);
@@ -1805,7 +1805,7 @@ static void udd_ep_trans_done(udd_ep_id_t ep)
// transfer size of UDD_ENDPOINT_MAX_TRANS Bytes
next_trans = UDD_ENDPOINT_MAX_TRANS;
// Set 0 to tranfer the maximum
// Set 0 to transfer the maximum
udd_dma_ctrl = UOTGHS_DEVDMACONTROL_BUFF_LENGTH(0);
} else {
udd_dma_ctrl = UOTGHS_DEVDMACONTROL_BUFF_LENGTH(next_trans);
@@ -1850,7 +1850,7 @@ static void udd_ep_trans_done(udd_ep_id_t ep)
}
cpu_irq_restore(flags);
// Here a ZLP has been recieved
// Here a ZLP has been received
// and the DMA transfer must be not started.
// It is the end of transfer
ptr_job->buf_size = ptr_job->buf_cnt;
@@ -1991,13 +1991,13 @@ static bool udd_ep_interrupt(void)
}
dbg_print("dma%x: ", ep);
udd_disable_endpoint_dma_interrupt(ep);
// Save number of data no transfered
// Save number of data no transferred
nb_remaining = (udd_endpoint_dma_get_status(ep) &
UOTGHS_DEVDMASTATUS_BUFF_COUNT_Msk)
>> UOTGHS_DEVDMASTATUS_BUFF_COUNT_Pos;
if (nb_remaining) {
// Transfer no complete (short packet or ZLP) then:
// Update number of data transfered
// Update number of data transferred
ptr_job->buf_cnt -= nb_remaining;
// Set transfer complete to stop the transfer
ptr_job->buf_size = ptr_job->buf_cnt;
@@ -2056,7 +2056,7 @@ static bool udd_ep_interrupt(void)
udd_disable_endpoint_interrupt(ep);
Assert(ptr_job->stall_requested);
// A stall has been requested during backgound transfer
// A stall has been requested during background transfer
ptr_job->stall_requested = false;
udd_disable_endpoint_bank_autoswitch(ep);
udd_enable_stall_handshake(ep);

2
Marlin/src/HAL/DUE/usb/usb_protocol_msc.h
View File

@@ -130,7 +130,7 @@ struct usb_msc_cbw {
struct usb_msc_csw {
le32_t dCSWSignature; //!< Must contain 'USBS'
le32_t dCSWTag; //!< Same as dCBWTag
le32_t dCSWDataResidue; //!< Number of bytes not transfered
le32_t dCSWDataResidue; //!< Number of bytes not transferred
uint8_t bCSWStatus; //!< Status code
};

2
Marlin/src/HAL/LINUX/hardware/Heater.cpp
View File

@@ -54,7 +54,7 @@ void Heater::update() {
}
void Heater::interrupt(GpioEvent ev) {
// ununsed
// unused
}
#endif // __PLAT_LINUX__

2
Marlin/src/HAL/LINUX/include/pinmapping.h
View File

@@ -55,7 +55,7 @@ constexpr bool VALID_PIN(const pin_t p) { return WITHIN(p, 0, NUM_DIGITAL_PINS);
// Test whether the pin is PWM
constexpr bool PWM_PIN(const pin_t p) { return false; }
// Test whether the pin is interruptable
// Test whether the pin is interruptible
constexpr bool INTERRUPT_PIN(const pin_t p) { return false; }
// Get the pin number at the given index

2
Marlin/src/HAL/SAMD51/HAL.cpp
View File

@@ -98,7 +98,7 @@
// Struct must be 32 bits aligned because of DMA accesses but fields needs to be 8 bits packed
typedef struct __attribute__((aligned(4), packed)) {
ADC_INPUTCTRL_Type INPUTCTRL;
} HAL_DMA_DAC_Registers; // DMA transfered registers
} HAL_DMA_DAC_Registers; // DMA transferred registers
#endif

2
Marlin/src/HAL/SAMD51/fastio.h
View File

@@ -131,7 +131,7 @@
*/
#define PWM_PIN(P) (WITHIN(P, 2, 13) || WITHIN(P, 22, 23) || WITHIN(P, 44, 45) || P == 48)
// Return fullfilled ADCx->INPUTCTRL.reg
// Return fulfilled ADCx->INPUTCTRL.reg
#define PIN_TO_INPUTCTRL(P) ( (PIN_TO_AIN(P) == 0) ? ADC_INPUTCTRL_MUXPOS_AIN0 \
: (PIN_TO_AIN(P) == 1) ? ADC_INPUTCTRL_MUXPOS_AIN1 \
: (PIN_TO_AIN(P) == 2) ? ADC_INPUTCTRL_MUXPOS_AIN2 \

2
Marlin/src/HAL/SAMD51/timers.cpp
View File

@@ -107,7 +107,7 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
tc->COUNT32.INTENCLR.reg = TC_INTENCLR_OVF; // disable overflow interrupt
// TCn clock setup
const uint8_t clockID = GCLK_CLKCTRL_IDs[TCC_INST_NUM + timer_num]; // TC clock are preceeded by TCC ones
const uint8_t clockID = GCLK_CLKCTRL_IDs[TCC_INST_NUM + timer_num]; // TC clock are preceded by TCC ones
GCLK->PCHCTRL[clockID].bit.CHEN = false;
SYNC(GCLK->PCHCTRL[clockID].bit.CHEN);
GCLK->PCHCTRL[clockID].reg = GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN; // 120MHz startup code programmed

2
Marlin/src/HAL/STM32/HAL_MinSerial.cpp
View File

@@ -125,7 +125,7 @@ static void TX(char c) {
}
regs->DR = c;
#else
// Let's hope a mystical guru will fix this, one day by writting interrupt-free USB CDC ACM code (or, at least, by polling the registers since interrupt will be queued but will never trigger)
// Let's hope a mystical guru will fix this, one day by writing interrupt-free USB CDC ACM code (or, at least, by polling the registers since interrupt will be queued but will never trigger)
// For now, it's completely lost to oblivion.
#endif
}

2
Marlin/src/HAL/STM32/Servo.cpp
View File

@@ -39,7 +39,7 @@ static_assert(COUNT(servoDelay) == NUM_SERVOS, "SERVO_DELAY must be an array NUM
// This allows all timer interrupt priorities to be managed from a single location in the HAL.
static uint32_t servo_interrupt_priority = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), TIM_IRQ_PRIO, TIM_IRQ_SUBPRIO);
// This must be called after the STM32 Servo class has intialized the timer.
// This must be called after the STM32 Servo class has initialized the timer.
// It may only be needed after the first call to attach(), but it is possible
// that is is necessary after every detach() call. To be safe this is currently
// called after every call to attach().

2
Marlin/src/HAL/STM32/eeprom_flash.cpp
View File

@@ -125,7 +125,7 @@ bool PersistentStore::access_start() {
address += sizeof(uint32_t);
}
if (current_slot == -1) {
// We didn't find anything, so we'll just intialize to empty
// We didn't find anything, so we'll just initialize to empty
for (int i = 0; i < MARLIN_EEPROM_SIZE; i++) ram_eeprom[i] = EMPTY_UINT8;
current_slot = EEPROM_SLOTS;
}

4
Marlin/src/HAL/STM32/msc_sd.cpp
View File

@@ -62,7 +62,7 @@ public:
return true;
}
// multi block optmization
// multi block optimization
sd2card->writeStart(blkAddr, blkLen);
while (blkLen--) {
watchdog_refresh();
@@ -82,7 +82,7 @@ public:
return true;
}
// multi block optmization
// multi block optimization
sd2card->readStart(blkAddr);
while (blkLen--) {
watchdog_refresh();

2
Marlin/src/HAL/STM32F1/HAL.cpp
View File

@@ -253,7 +253,7 @@ static void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
reg_value = (reg_value |
((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << 8)); /* Insert write key and priorty group */
(PriorityGroupTmp << 8)); /* Insert write key & priority group */
SCB->AIRCR = reg_value;
}

4
Marlin/src/HAL/STM32F1/SPI.cpp
View File

@@ -363,8 +363,8 @@ uint16_t SPIClass::transfer16(uint16_t data) const {
/**
* Roger Clark and Victor Perez, 2015
* Performs a DMA SPI transfer with at least a receive buffer.
* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
* On exit TX buffer is not modified, and RX buffer cotains the received data.
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
* On exit TX buffer is not modified, and RX buffer contains the received data.
* Still in progress.
*/
void SPIClass::dmaTransferSet(const void *transmitBuf, void *receiveBuf) {

6
Marlin/src/HAL/STM32F1/onboard_sd.h
View File

@@ -7,8 +7,8 @@
#pragma once
#define _DISKIO_WRITE 1 /* 1: Enable disk_write function */
#define _DISKIO_IOCTL 1 /* 1: Enable disk_ioctl fucntion */
#define _DISKIO_ISDIO 0 /* 1: Enable iSDIO control fucntion */
#define _DISKIO_IOCTL 1 /* 1: Enable disk_ioctl function */
#define _DISKIO_ISDIO 0 /* 1: Enable iSDIO control function */
typedef unsigned char BYTE;
typedef unsigned short WORD;
@@ -56,7 +56,7 @@ DRESULT disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
#define STA_NODISK 0x02 /* No medium in the drive */
#define STA_PROTECT 0x04 /* Write protected */
/* Command code for disk_ioctrl fucntion */
/* Command code for disk_ioctrl function */
/* Generic command (Used by FatFs) */
#define CTRL_SYNC 0 /* Complete pending write process (needed at _FS_READONLY == 0) */

2
Marlin/src/HAL/STM32F1/timers.h
View File

@@ -166,7 +166,7 @@ FORCE_INLINE static void HAL_timer_set_compare(const uint8_t timer_num, const ha
case STEP_TIMER_NUM:
// NOTE: WE have set ARPE = 0, which means the Auto reload register is not preloaded
// and there is no need to use any compare, as in the timer mode used, setting ARR to the compare value
// will result in exactly the same effect, ie trigerring an interrupt, and on top, set counter to 0
// will result in exactly the same effect, ie triggering an interrupt, and on top, set counter to 0
timer_set_reload(STEP_TIMER_DEV, compare); // We reload direct ARR as needed during counting up
break;
case TEMP_TIMER_NUM:

2
Marlin/src/HAL/TEENSY31_32/HAL_SPI.cpp
View File

@@ -65,7 +65,7 @@ void spiInit(uint8_t spiRate) {
case SPI_EIGHTH_SPEED: clock = 1250000; break;
case SPI_SPEED_5: clock = 625000; break;
case SPI_SPEED_6: clock = 312500; break;
default: clock = 4000000; // Default from the SPI libarary
default: clock = 4000000; // Default from the SPI library
}
spiConfig = SPISettings(clock, MSBFIRST, SPI_MODE0);
SPI.begin();

2
Marlin/src/HAL/TEENSY35_36/HAL_SPI.cpp
View File

@@ -65,7 +65,7 @@ void spiInit(uint8_t spiRate) {
case SPI_SPEED_5: clock = 625000; break;
case SPI_SPEED_6: clock = 312500; break;
default:
clock = 4000000; // Default from the SPI libarary
clock = 4000000; // Default from the SPI library
}
spiConfig = SPISettings(clock, MSBFIRST, SPI_MODE0);
SPI.begin();

2
Marlin/src/HAL/TEENSY40_41/HAL_SPI.cpp
View File

@@ -82,7 +82,7 @@ void spiInit(uint8_t spiRate) {
case SPI_SPEED_5: clock = 625000; break;
case SPI_SPEED_6: clock = 312500; break;
default:
clock = 4000000; // Default from the SPI libarary
clock = 4000000; // Default from the SPI library
}
spiConfig = SPISettings(clock, MSBFIRST, SPI_MODE0);
SPI.begin();

2
Marlin/src/HAL/shared/backtrace/unwarm.h
View File

@@ -4,7 +4,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
***************************************************************************

2
Marlin/src/HAL/shared/backtrace/unwarmbytab.h
View File

@@ -5,7 +5,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
***************************************************************************

2
Marlin/src/HAL/shared/backtrace/unwarmmem.cpp
View File

@@ -5,7 +5,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
***************************************************************************

2
Marlin/src/HAL/shared/backtrace/unwarmmem.h
View File

@@ -5,7 +5,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
***************************************************************************

2
Marlin/src/HAL/shared/backtrace/unwinder.cpp
View File

@@ -28,7 +28,7 @@ extern "C" const UnwTabEntry __exidx_end[];
// Detect if unwind information is present or not
static int HasUnwindTableInfo() {
// > 16 because there are default entries we can't supress
// > 16 because there are default entries we can't suppress
return ((char*)(&__exidx_end) - (char*)(&__exidx_start)) > 16 ? 1 : 0;
}

2
Marlin/src/HAL/shared/backtrace/unwinder.h
View File

@@ -5,7 +5,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
**************************************************************************/

2
Marlin/src/HAL/shared/backtrace/unwmemaccess.h
View File

@@ -5,7 +5,7 @@
* This program is PUBLIC DOMAIN.
* This means that there is no copyright and anyone is able to take a copy
* for free and use it as they wish, with or without modifications, and in
* any context, commerically or otherwise. The only limitation is that I
* any context, commercially or otherwise. The only limitation is that I
* don't guarantee that the software is fit for any purpose or accept any
* liability for its use or misuse - this software is without warranty.
***************************************************************************

2
Marlin/src/HAL/shared/cpu_exception/exception_arm.cpp
View File

@@ -345,7 +345,7 @@ void hook_cpu_exceptions() {
// We failed to find a valid vector table size, let's abort hooking up
if (vec_size == VECTOR_TABLE_SENTINEL) return;
// Poor method that's wasting RAM here, but allocating with malloc and alignment would be worst
// 128 bytes alignement is required for writing the VTOR register
// 128 bytes alignment is required for writing the VTOR register
alignas(128) static unsigned long vectable[VECTOR_TABLE_SENTINEL];
SERIAL_ECHOPGM("Detected vector table size: ");