Fix SAMD51 timer usage (#17471)

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Giuliano Zaro 2020-04-16 11:38:17 +02:00 committed by GitHub
parent 78a5079558
commit c16818b261
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2 changed files with 8 additions and 4 deletions

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@ -55,7 +55,7 @@
static volatile int8_t currentServoIndex[_Nbr_16timers]; // index for the servo being pulsed for each timer (or -1 if refresh interval)
FORCE_INLINE static uint16_t getTimerCount() {
Tc * const tc = TimerConfig[SERVO_TC].pTimer;
Tc * const tc = TimerConfig[SERVO_TC].pTc;
tc->COUNT16.CTRLBSET.reg = TC_CTRLBCLR_CMD_READSYNC;
SYNC(tc->COUNT16.SYNCBUSY.bit.CTRLB || tc->COUNT16.SYNCBUSY.bit.COUNT);
@ -67,7 +67,7 @@ FORCE_INLINE static uint16_t getTimerCount() {
// Interrupt handler for the TC
// ----------------------------
HAL_SERVO_TIMER_ISR() {
Tc * const tc = TimerConfig[SERVO_TC].pTimer;
Tc * const tc = TimerConfig[SERVO_TC].pTc;
const timer16_Sequence_t timer =
#ifndef _useTimer1
_timer2
@ -127,7 +127,7 @@ HAL_SERVO_TIMER_ISR() {
}
void initISR(timer16_Sequence_t timer) {
Tc * const tc = TimerConfig[SERVO_TC].pTimer;
Tc * const tc = TimerConfig[SERVO_TC].pTc;
const uint8_t tcChannel = TIMER_TCCHANNEL(timer);
static bool initialized = false; // Servo TC has been initialized
@ -204,7 +204,7 @@ void initISR(timer16_Sequence_t timer) {
}
void finISR(timer16_Sequence_t timer) {
Tc * const tc = TimerConfig[SERVO_TC].pTimer;
Tc * const tc = TimerConfig[SERVO_TC].pTc;
const uint8_t tcChannel = TIMER_TCCHANNEL(timer);
// Disable the match channel interrupt request

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@ -35,6 +35,10 @@
#error "OnBoard SPI BUS can't be shared with other devices."
#endif
#if SERVO_TC == RTC_TIMER_NUM
#error "Servos can't use RTC timer"
#endif
#if ENABLED(EMERGENCY_PARSER)
#error "EMERGENCY_PARSER is not yet implemented for SAMD51. Disable EMERGENCY_PARSER to continue."
#endif