Revert "[2.0.x] DUE compatibility with shared SPI LCDs, USB mass storage, add pin defs & update examples\MakerParts\Configuration.h"
This commit is contained in:
Bob-the-Kuhn
GitHub
@ -53,7 +53,6 @@
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// --------------------------------------------------------------------------
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#if ENABLED(SOFTWARE_SPI)
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// --------------------------------------------------------------------------
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// software SPI
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// --------------------------------------------------------------------------
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@ -494,77 +493,44 @@
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static pfnSpiTxBlock spiTxBlock = spiTxBlockX;
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static pfnSpiRxBlock spiRxBlock = spiRxBlockX;
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#if MB(ALLIGATOR) // control SDSS pin
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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WRITE(SS_PIN, HIGH);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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WRITE(SS_PIN, HIGH);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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uint8_t spiRec() {
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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WRITE(SS_PIN, HIGH);
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return b;
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}
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uint8_t spiRec() {
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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WRITE(SS_PIN, HIGH);
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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WRITE(SS_PIN, HIGH);
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}
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WRITE(SS_PIN, LOW);
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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WRITE(SS_PIN, HIGH);
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}
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void spiSend(uint8_t b) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(b);
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WRITE(SS_PIN, HIGH);
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}
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void spiSend(uint8_t b) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(b);
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WRITE(SS_PIN, HIGH);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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WRITE(SS_PIN, HIGH);
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#else // let calling routine control SDSS
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void spiBegin() {
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SET_OUTPUT(SS_PIN);
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SET_OUTPUT(SCK_PIN);
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SET_INPUT(MISO_PIN);
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SET_OUTPUT(MOSI_PIN);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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uint8_t spiRec() {
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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uint8_t b = spiTransferRx(0xFF);
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return b;
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}
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void spiRead(uint8_t* buf, uint16_t nbyte) {
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uint32_t todo = nbyte;
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if (todo == 0) return;
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WRITE(MOSI_PIN, 1); /* Output 1s 1*/
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spiRxBlock(buf,nbyte);
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}
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void spiSend(uint8_t b) {
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(void) spiTransferTx(b);
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}
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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#endif
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WRITE(SS_PIN, LOW);
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(void) spiTransferTx(token);
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spiTxBlock(buf,512);
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WRITE(SS_PIN, HIGH);
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}
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/**
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@ -600,9 +566,7 @@
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break;
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}
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#if MB(ALLIGATOR)
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WRITE(SS_PIN, HIGH);
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#endif
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WRITE(SS_PIN, HIGH);
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WRITE(MOSI_PIN, HIGH);
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WRITE(SCK_PIN, LOW);
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}
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@ -610,296 +574,211 @@
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/** Begin SPI transaction, set clock, bit order, data mode */
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void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
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// TODO: to be implemented
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}
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#pragma GCC reset_options
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#else
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// --------------------------------------------------------------------------
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// hardware SPI
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// --------------------------------------------------------------------------
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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bool spiInitMaded = false;
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#if MB(ALLIGATOR)
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// slave selects controlled by SPI controller
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// doesn't support changing SPI speeds for SD card
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// --------------------------------------------------------------------------
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// hardware SPI
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// --------------------------------------------------------------------------
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// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
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int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
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bool spiInitMaded = false;
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void spiBegin() {
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if(spiInitMaded == false) {
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// Configure SPI pins
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PIO_Configure(
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g_APinDescription[SCK_PIN].pPort,
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g_APinDescription[SCK_PIN].ulPinType,
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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void spiBegin() {
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if(spiInitMaded == false) {
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// Configure SPI pins
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PIO_Configure(
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g_APinDescription[SCK_PIN].pPort,
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g_APinDescription[SCK_PIN].ulPinType,
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g_APinDescription[SCK_PIN].ulPin,
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g_APinDescription[SCK_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MOSI_PIN].pPort,
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g_APinDescription[MOSI_PIN].ulPinType,
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g_APinDescription[MOSI_PIN].ulPin,
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g_APinDescription[MOSI_PIN].ulPinConfiguration);
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PIO_Configure(
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g_APinDescription[MISO_PIN].pPort,
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g_APinDescription[MISO_PIN].ulPinType,
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g_APinDescription[MISO_PIN].ulPin,
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g_APinDescription[MISO_PIN].ulPinConfiguration);
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// set master mode, peripheral select, fault detection
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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SPI_Enable(SPI0);
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// set master mode, peripheral select, fault detection
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SPI_Configure(SPI0, ID_SPI0, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PS);
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SPI_Enable(SPI0);
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#if MB(ALLIGATOR)
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SET_OUTPUT(DAC0_SYNC);
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#if EXTRUDERS > 1
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SET_OUTPUT(DAC1_SYNC);
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WRITE(DAC1_SYNC, HIGH);
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#endif
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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#endif // MB(ALLIGATOR)
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#if MB(ALLIGATOR)
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SET_OUTPUT(DAC0_SYNC);
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#if EXTRUDERS > 1
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SET_OUTPUT(DAC1_SYNC);
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WRITE(DAC1_SYNC, HIGH);
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#endif
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SET_OUTPUT(SPI_EEPROM1_CS);
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SET_OUTPUT(SPI_EEPROM2_CS);
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SET_OUTPUT(SPI_FLASH_CS);
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WRITE(DAC0_SYNC, HIGH);
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WRITE(SPI_EEPROM1_CS, HIGH );
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WRITE(SPI_EEPROM2_CS, HIGH );
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WRITE(SPI_FLASH_CS, HIGH );
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WRITE(SS_PIN, HIGH );
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#endif // MB(ALLIGATOR)
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OUT_WRITE(SDSS,0);
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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spiInit(1);
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spiInitMaded = true;
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}
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PIO_Configure(
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g_APinDescription[SPI_PIN].pPort,
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g_APinDescription[SPI_PIN].ulPinType,
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g_APinDescription[SPI_PIN].ulPin,
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g_APinDescription[SPI_PIN].ulPinConfiguration);
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spiInit(1);
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spiInitMaded = true;
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}
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}
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void spiInit(uint8_t spiRate) {
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if(spiInitMaded == false) {
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if(spiRate > 6) spiRate = 1;
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void spiInit(uint8_t spiRate) {
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if(spiInitMaded == false) {
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if(spiRate > 6) spiRate = 1;
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#if MB(ALLIGATOR)
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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#endif//MB(ALLIGATOR)
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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#if MB(ALLIGATOR)
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// Set SPI mode 1, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_DAC,
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_Enable(SPI0);
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spiInitMaded = true;
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}
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}
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN_EEPROM1, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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#endif//MB(ALLIGATOR)
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// Write single byte to SPI
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void spiSend(byte b) {
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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// Set SPI mode 0, clock, select not active after transfer, with delay between transfers
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SPI_ConfigureNPCS(SPI0, SPI_CHAN, SPI_CSR_NCPHA |
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SPI_CSR_CSAAT | SPI_CSR_SCBR(spiDueDividors[spiRate]) |
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SPI_CSR_DLYBCT(1));
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SPI_Enable(SPI0);
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spiInitMaded = true;
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}
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}
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// Write single byte to SPI
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void spiSend(byte b) {
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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SPI0->SPI_RDR;
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//delayMicroseconds(1U);
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}
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void spiSend(const uint8_t* buf, size_t n) {
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if (n == 0) return;
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for (size_t i = 0; i < n - 1; i++) {
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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SPI0->SPI_RDR;
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//delayMicroseconds(1U);
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}
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spiSend(buf[n - 1]);
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}
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void spiSend(const uint8_t* buf, size_t n) {
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if (n == 0) return;
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for (size_t i = 0; i < n - 1; i++) {
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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SPI0->SPI_RDR;
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//delayMicroseconds(1U);
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}
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spiSend(buf[n - 1]);
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}
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void spiSend(uint32_t chan, byte b) {
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uint8_t dummy_read = 0;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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dummy_read = SPI0->SPI_RDR;
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UNUSED(dummy_read);
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}
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void spiSend(uint32_t chan, byte b) {
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uint8_t dummy_read = 0;
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// wait for transmit register empty
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void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
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uint8_t dummy_read = 0;
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if (n == 0) return;
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for (int i = 0; i < (int)n - 1; i++) {
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// write byte with address and end transmission flag
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SPI0->SPI_TDR = (uint32_t)b | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// clear status
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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dummy_read = SPI0->SPI_RDR;
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UNUSED(dummy_read);
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}
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spiSend(chan, buf[n - 1]);
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}
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void spiSend(uint32_t chan, const uint8_t* buf, size_t n) {
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uint8_t dummy_read = 0;
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if (n == 0) return;
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for (int i = 0; i < (int)n - 1; i++) {
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(chan);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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dummy_read = SPI0->SPI_RDR;
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UNUSED(dummy_read);
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}
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spiSend(chan, buf[n - 1]);
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}
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// Read single byte from SPI
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uint8_t spiRec() {
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// Read single byte from SPI
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uint8_t spiRec() {
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN) | SPI_TDR_LASTXFER;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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//delayMicroseconds(1U);
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return SPI0->SPI_RDR;
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}
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// wait for receive register
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uint8_t spiRec(uint32_t chan) {
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uint8_t spirec_tmp;
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// wait for transmit register empty
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while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
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spirec_tmp = SPI0->SPI_RDR;
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UNUSED(spirec_tmp);
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// write dummy byte with address and end transmission flag
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SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
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// wait for receive register
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while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
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// get byte from receive register
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return SPI0->SPI_RDR;
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}
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// Read from SPI into buffer
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void spiRead(uint8_t*buf, uint16_t nbyte) {
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if (nbyte-- == 0) return;
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for (int i = 0; i < nbyte; i++) {
|
||||
//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
// get byte from receive register
|
||||
buf[i] = SPI0->SPI_RDR;
|
||||
//delayMicroseconds(1U);
|
||||
return SPI0->SPI_RDR;
|
||||
}
|
||||
buf[nbyte] = spiRec();
|
||||
}
|
||||
|
||||
uint8_t spiRec(uint32_t chan) {
|
||||
uint8_t spirec_tmp;
|
||||
// wait for transmit register empty
|
||||
// Write from buffer to SPI
|
||||
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
//SPI0->SPI_RDR;
|
||||
for (int i = 0; i < 511; i++) {
|
||||
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 1)
|
||||
spirec_tmp = SPI0->SPI_RDR;
|
||||
UNUSED(spirec_tmp);
|
||||
|
||||
// write dummy byte with address and end transmission flag
|
||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(chan) | SPI_TDR_LASTXFER;
|
||||
|
||||
// wait for receive register
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
// get byte from receive register
|
||||
return SPI0->SPI_RDR;
|
||||
SPI0->SPI_RDR;
|
||||
//delayMicroseconds(1U);
|
||||
}
|
||||
spiSend(buf[511]);
|
||||
}
|
||||
|
||||
// Read from SPI into buffer
|
||||
void spiRead(uint8_t*buf, uint16_t nbyte) {
|
||||
if (nbyte-- == 0) return;
|
||||
/** Begin SPI transaction, set clock, bit order, data mode */
|
||||
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
|
||||
// TODO: to be implemented
|
||||
}
|
||||
|
||||
for (int i = 0; i < nbyte; i++) {
|
||||
//while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
SPI0->SPI_TDR = 0x000000FF | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
buf[i] = SPI0->SPI_RDR;
|
||||
//delayMicroseconds(1U);
|
||||
}
|
||||
buf[nbyte] = spiRec();
|
||||
}
|
||||
|
||||
// Write from buffer to SPI
|
||||
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||
SPI0->SPI_TDR = (uint32_t)token | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
//while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
//SPI0->SPI_RDR;
|
||||
for (int i = 0; i < 511; i++) {
|
||||
SPI0->SPI_TDR = (uint32_t)buf[i] | SPI_PCS(SPI_CHAN);
|
||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
SPI0->SPI_RDR;
|
||||
//delayMicroseconds(1U);
|
||||
}
|
||||
spiSend(buf[511]);
|
||||
}
|
||||
|
||||
/** Begin SPI transaction, set clock, bit order, data mode */
|
||||
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
|
||||
// TODO: to be implemented
|
||||
}
|
||||
|
||||
#else // U8G compatible hardware SPI
|
||||
|
||||
void spiInit(uint8_t spiRate = 6 ) { // default to slowest rate if not specified)
|
||||
// 8.4 MHz, 4 MHz, 2 MHz, 1 MHz, 0.5 MHz, 0.329 MHz, 0.329 MHz
|
||||
int spiDueDividors[] = { 10, 21, 42, 84, 168, 255, 255 };
|
||||
if(spiRate > 6) spiRate = 1;
|
||||
|
||||
/* enable PIOA and SPI0 */
|
||||
REG_PMC_PCER0 = (1UL << ID_PIOA) | (1UL << ID_SPI0);
|
||||
|
||||
/* disable PIO on A26 and A27 */
|
||||
REG_PIOA_PDR = 0x0c000000;
|
||||
OUT_WRITE(SDSS, 1);
|
||||
|
||||
/* reset SPI0 (from sam lib) */
|
||||
SPI0->SPI_CR = SPI_CR_SPIDIS;
|
||||
SPI0->SPI_CR = SPI_CR_SWRST;
|
||||
SPI0->SPI_CR = SPI_CR_SWRST;
|
||||
SPI0->SPI_CR = SPI_CR_SPIEN;
|
||||
|
||||
|
||||
/* master mode, no fault detection, chip select 0 */
|
||||
SPI0->SPI_MR = SPI_MR_MSTR | SPI_MR_PCSDEC | SPI_MR_MODFDIS;
|
||||
|
||||
/* SPI mode 0, 8 Bit data transfer, baud rate */
|
||||
SPI0->SPI_CSR[0] = SPI_CSR_SCBR(spiDueDividors[spiRate]) | 1;
|
||||
}
|
||||
|
||||
static uint8_t spiTransfer(uint8_t data) {
|
||||
|
||||
/* wait until tx register is empty */
|
||||
while( (SPI0->SPI_SR & SPI_SR_TDRE) == 0 );
|
||||
/* send data */
|
||||
SPI0->SPI_TDR = (uint32_t)data; // | SPI_PCS(0xF);
|
||||
|
||||
// wait for transmit register empty
|
||||
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
|
||||
|
||||
// wait for receive register
|
||||
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
|
||||
// get byte from receive register
|
||||
return SPI0->SPI_RDR;
|
||||
}
|
||||
|
||||
void spiBegin() {
|
||||
spiInit();
|
||||
}
|
||||
|
||||
uint8_t spiRec() {
|
||||
uint8_t data = spiTransfer(0xff);
|
||||
return data;
|
||||
}
|
||||
|
||||
void spiRead(uint8_t*buf, uint16_t nbyte) {
|
||||
if (nbyte == 0) return;
|
||||
for (int i = 0; i < nbyte; i++) {
|
||||
buf[i] = spiTransfer(0xff);
|
||||
}
|
||||
}
|
||||
|
||||
void spiSend(uint8_t data) {
|
||||
spiTransfer(data);
|
||||
}
|
||||
|
||||
void spiSend(const uint8_t* buf, size_t n) {
|
||||
if (n == 0) return;
|
||||
for (uint16_t i = 0; i < n; i++)
|
||||
spiTransfer(buf[i]);
|
||||
}
|
||||
|
||||
void spiSendBlock(uint8_t token, const uint8_t* buf) {
|
||||
spiTransfer(token);
|
||||
for (uint16_t i = 0; i < 512; i++)
|
||||
spiTransfer(buf[i]);
|
||||
}
|
||||
|
||||
#endif //MB(ALLIGATOR)
|
||||
#endif // ENABLED(SOFTWARE_SPI)
|
||||
|
||||
#endif // ARDUINO_ARCH_SAM
|
||||
|
||||
Reference in New Issue
Block a user