M355 S0, S1 fixes & faster LCD, SD card
fix Travis error
This commit is contained in:
Christopher Pepper
committed by
Bob-the-Kuhn
Bob-the-Kuhn
parent
8c622a59cf
commit
bea3ec2724
@ -23,20 +23,21 @@
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#ifndef ULCDST7565_H
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#define ULCDST7565_H
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#include "../../inc/MarlinConfig.h"
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#include <src/Marlin.h>
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#if ENABLED(U8GLIB_ST7565_64128N)
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#if !( defined(DOGLCD_SCK) && DOGLCD_SCK >= 0 \
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&& defined(DOGLCD_MOSI) && DOGLCD_MOSI >= 0 \
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&& defined(DOGLCD_CS) && DOGLCD_CS >= 0 \
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&& defined(DOGLCD_A0) && DOGLCD_A0 >= 0 )
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#error "DOGLCD_SCK, DOGLCD_MOSI, DOGLCD_CS, and DOGLCD_A0 are required for VIKI."
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#endif
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#define ST7565_CLK_PIN DOGLCD_SCK
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#define ST7565_DAT_PIN DOGLCD_MOSI
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#define ST7565_CS_PIN DOGLCD_CS
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#define ST7565_A0_PIN DOGLCD_A0
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#include <U8glib.h>
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#define WIDTH 128
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@ -91,23 +92,34 @@
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#define ST7565_DELAY_3 CPU_ST7565_DELAY_3
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#endif
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#define ST7565_SND_BIT \
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WRITE(ST7565_CLK_PIN, LOW); ST7565_DELAY_1; \
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WRITE(ST7565_DAT_PIN, val & 0x80); ST7565_DELAY_2; \
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WRITE(ST7565_CLK_PIN, HIGH); ST7565_DELAY_3; \
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WRITE(ST7565_CLK_PIN, LOW);\
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val <<= 1
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static void ST7565_SWSPI_SND_8BIT(uint8_t val) {
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ST7565_SND_BIT; // 1
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ST7565_SND_BIT; // 2
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ST7565_SND_BIT; // 3
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ST7565_SND_BIT; // 4
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ST7565_SND_BIT; // 5
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ST7565_SND_BIT; // 6
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ST7565_SND_BIT; // 7
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ST7565_SND_BIT; // 8
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}
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#if ENABLED(SHARED_SPI) // Re-ARM requires that the LCD and the SD card share a single SPI
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#define ST7565_WRITE_BYTE(a) { spiSend((uint8_t)a); U8G_DELAY; }
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#define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) {spiSend( *ptr++);} DELAY_10US; }
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#else
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#define ST7565_SND_BIT \
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WRITE(ST7565_CLK_PIN, LOW); ST7565_DELAY_1; \
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WRITE(ST7565_DAT_PIN, val & 0x80); ST7565_DELAY_2; \
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WRITE(ST7565_CLK_PIN, HIGH); ST7565_DELAY_3; \
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WRITE(ST7565_CLK_PIN, LOW);\
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val <<= 1
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static void ST7565_SWSPI_SND_8BIT(uint8_t val) {
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ST7565_SND_BIT; // 1
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ST7565_SND_BIT; // 2
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ST7565_SND_BIT; // 3
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ST7565_SND_BIT; // 4
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ST7565_SND_BIT; // 5
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ST7565_SND_BIT; // 6
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ST7565_SND_BIT; // 7
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ST7565_SND_BIT; // 8
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}
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#define ST7565_WRITE_BYTE(a) { ST7565_SWSPI_SND_8BIT((uint8_t)a); U8G_DELAY; }
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#define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) {ST7565_SWSPI_SND_8BIT( *ptr++);} DELAY_10US; }
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#endif
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#if defined(DOGM_SPI_DELAY_US) && DOGM_SPI_DELAY_US > 0
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#define U8G_DELAY delayMicroseconds(DOGM_SPI_DELAY_US)
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@ -115,116 +127,128 @@ static void ST7565_SWSPI_SND_8BIT(uint8_t val) {
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#define U8G_DELAY u8g_10MicroDelay()
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#endif
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#define ST7565_CS() do{ WRITE(ST7565_CS_PIN, HIGH); U8G_DELAY; }while(0)
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#define ST7565_NCS() WRITE(ST7565_CS_PIN, LOW)
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#define ST7565_A0() do{ WRITE(ST7565_A0_PIN, HIGH); U8G_DELAY; }while(0)
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#define ST7565_NA0() WRITE(ST7565_A0_PIN, LOW)
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#define ST7565_WRITE_BYTE(a) do{ ST7565_SWSPI_SND_8BIT((uint8_t)a); U8G_DELAY; }while(0)
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#define ST7560_WriteSequence(count, pointer) do{ uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; ++i) { ST7565_SWSPI_SND_8BIT(*ptr++); } DELAY_10US; }while(0)
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#define ST7565_CS() { WRITE(ST7565_CS_PIN,1); U8G_DELAY; }
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#define ST7565_NCS() { WRITE(ST7565_CS_PIN,0); }
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#define ST7565_A0() { WRITE(ST7565_A0_PIN,1); U8G_DELAY; }
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#define ST7565_NA0() { WRITE(ST7565_A0_PIN,0); }
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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switch (msg) {
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case U8G_DEV_MSG_INIT: {
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case U8G_DEV_MSG_INIT:
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{
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OUT_WRITE(ST7565_CS_PIN, LOW);
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OUT_WRITE(ST7565_DAT_PIN, LOW);
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OUT_WRITE(ST7565_CLK_PIN, LOW);
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#if ENABLED(SHARED_SPI)
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u8g_Delay(250);
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spiBegin();
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#ifndef SPI_SPEED
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#define SPI_SPEED SPI_FULL_SPEED // use same SPI speed as SD card
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#endif
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spiInit(SPI_SPEED);
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#else
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OUT_WRITE(ST7565_DAT_PIN, LOW);
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OUT_WRITE(ST7565_CLK_PIN, LOW);
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#endif
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OUT_WRITE(ST7565_A0_PIN, LOW);
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ST7565_CS(); // disable chip
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // enable chip
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ST7565_CS(); /* disable chip */
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0xA2); // 0xA2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
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ST7565_WRITE_BYTE(0xA0); // Normal ADC Select (according to Displaytech 64128N datasheet)
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ST7565_WRITE_BYTE(0xC8); // common output mode: set scan direction normal operation/SHL Select; 0xC0 --> SHL = 0; normal; 0xC8 --> SHL = 1
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ST7565_WRITE_BYTE(0x40); // Display start line for Displaytech 64128N
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ST7565_WRITE_BYTE(0x0A2); /* 0x0a2: LCD bias 1/9 (according to Displaytech 64128N datasheet) */
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ST7565_WRITE_BYTE(0x0A0); /* Normal ADC Select (according to Displaytech 64128N datasheet) */
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ST7565_WRITE_BYTE(0x28 | 0x04); // power control: turn on voltage converter
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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ST7565_WRITE_BYTE(0x0c8); /* common output mode: set scan direction normal operation/SHL Select; 0x0c0 --> SHL = 0; normal; 0x0c8 --> SHL = 1 */
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ST7565_WRITE_BYTE(0x040); /* Display start line for Displaytech 64128N */
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ST7565_WRITE_BYTE(0x28 | 0x06); // power control: turn on voltage regulator
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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ST7565_WRITE_BYTE(0x028 | 0x04); /* power control: turn on voltage converter */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0x28 | 0x07); // power control: turn on voltage follower
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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ST7565_WRITE_BYTE(0x028 | 0x06); /* power control: turn on voltage regulator */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0x10); // Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N
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ST7565_WRITE_BYTE(0x028 | 0x07); /* power control: turn on voltage follower */
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// U8G_ESC_DLY(50); /* delay 50 ms - hangs after a reset if used */
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ST7565_WRITE_BYTE(0xA6); // display normal, bit val 0: LCD pixel off.
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ST7565_WRITE_BYTE(0x81); // set contrast
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ST7565_WRITE_BYTE(0x1E); // Contrast value. Setting for controlling brightness of Displaytech 64128N
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ST7565_WRITE_BYTE(0x010); /* Set V0 voltage resistor ratio. Setting for controlling brightness of Displaytech 64128N */
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ST7565_WRITE_BYTE(0xAF); // display on
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ST7565_WRITE_BYTE(0x0a6); /* display normal, bit val 0: LCD pixel off. */
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U8G_ESC_DLY(100); // delay 100 ms
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ST7565_WRITE_BYTE(0xA5); // display all points; ST7565
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U8G_ESC_DLY(100); // delay 100 ms
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U8G_ESC_DLY(100); // delay 100 ms
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ST7565_WRITE_BYTE(0xA4); // normal display
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ST7565_CS(); // disable chip
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} // end of sequence
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ST7565_WRITE_BYTE(0x081); /* set contrast */
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ST7565_WRITE_BYTE(0x01e); /* Contrast value. Setting for controlling brightness of Displaytech 64128N */
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ST7565_WRITE_BYTE(0x0af); /* display on */
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U8G_ESC_DLY(100); /* delay 100 ms */
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ST7565_WRITE_BYTE(0x0a5); /* display all points; ST7565 */
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U8G_ESC_DLY(100); /* delay 100 ms */
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U8G_ESC_DLY(100); /* delay 100 ms */
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ST7565_WRITE_BYTE(0x0a4); /* normal display */
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ST7565_CS(); /* disable chip */
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} /* end of sequence */
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT: {
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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ST7565_CS(); // disable chip
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // enable chip
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ST7565_WRITE_BYTE(0x10); // set upper 4 bit of the col adr to 0x10
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ST7565_WRITE_BYTE(0x00); // set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N
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// end of sequence
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ST7565_WRITE_BYTE(0xB0 | (2 * pb->p.page)); // select current page (ST7565R)
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ST7565_A0(); // data mode
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ST7560_WriteSequence((uint8_t)pb->width, (uint8_t*)pb->buf);
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ST7565_CS(); // disable chip
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // enable chip
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ST7565_WRITE_BYTE(0x10); // set upper 4 bit of the col adr to 0x10
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ST7565_WRITE_BYTE(0x00); // set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N
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// end of sequence
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ST7565_WRITE_BYTE(0xB0 | (2 * pb->p.page + 1)); // select current page (ST7565R)
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ST7565_A0(); // data mode
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ST7560_WriteSequence((uint8_t)pb->width, (uint8_t*)(pb->buf)+pb->width);
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ST7565_CS(); // disable chip
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case U8G_DEV_MSG_PAGE_NEXT:
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{ u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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ST7565_CS(); /* disable chip */
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
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ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
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/* end of sequence */
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ST7565_WRITE_BYTE(0x0b0 | (2*pb->p.page));; /* select current page (ST7565R) */
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ST7565_A0(); /* data mode */
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ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)pb->buf);
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ST7565_CS(); /* disable chip */
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x010); /* set upper 4 bit of the col adr to 0x10 */
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ST7565_WRITE_BYTE(0x000); /* set lower 4 bit of the col adr to 0x00. Changed for DisplayTech 64128N */
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/* end of sequence */
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ST7565_WRITE_BYTE(0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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ST7565_A0(); /* data mode */
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ST7560_WriteSequence( (uint8_t) pb->width, (uint8_t *)(pb->buf)+pb->width);
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ST7565_CS(); /* disable chip */
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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ST7565_NCS();
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ST7565_NA0(); // instruction mode
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ST7565_WRITE_BYTE(0x81);
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ST7565_NA0(); /* instruction mode */
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ST7565_WRITE_BYTE(0x081);
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ST7565_WRITE_BYTE((*(uint8_t *)arg) >> 2);
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ST7565_CS(); // disable chip
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ST7565_CS(); /* disable chip */
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return 1;
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case U8G_DEV_MSG_SLEEP_ON:
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // enable chip
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ST7565_WRITE_BYTE(0xAC); // static indicator off
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ST7565_WRITE_BYTE(0x00); // indicator register set (not sure if this is required)
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ST7565_WRITE_BYTE(0xAE); // display off
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ST7565_WRITE_BYTE(0xA5); // all points on
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ST7565_CS(); // disable chip , bugfix 12 nov 2014
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// end of sequence
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x0ac); /* static indicator off */
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ST7565_WRITE_BYTE(0x000); /* indicator register set (not sure if this is required) */
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ST7565_WRITE_BYTE(0x0ae); /* display off */
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ST7565_WRITE_BYTE(0x0a5); /* all points on */
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ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
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/* end of sequence */
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return 1;
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case U8G_DEV_MSG_SLEEP_OFF:
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // enable chip
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ST7565_WRITE_BYTE(0xA4); // all points off
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ST7565_WRITE_BYTE(0xAF); // display on
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U8G_ESC_DLY(50); // delay 50 ms
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ST7565_CS(); // disable chip , bugfix 12 nov 2014
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// end of sequence
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ST7565_NA0(); /* instruction mode */
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ST7565_NCS(); /* enable chip */
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ST7565_WRITE_BYTE(0x0a4); /* all points off */
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ST7565_WRITE_BYTE(0x0af); /* display on */
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U8G_ESC_DLY(50); /* delay 50 ms */
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ST7565_CS(); /* disable chip , bugfix 12 nov 2014 */
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/* end of sequence */
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return 1;
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}
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return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
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}
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_buf[WIDTH*2] U8G_NOCOMMON;
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u8g_pb_t u8g_dev_st7565_64128n_2x_VIKI_pb = { { 16, HEIGHT, 0, 0, 0 }, WIDTH, u8g_dev_st7565_64128n_2x_VIKI_buf };
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u8g_dev_t u8g_dev_st7565_64128n_2x_VIKI_sw_spi = { u8g_dev_st7565_64128n_2x_VIKI_fn, &u8g_dev_st7565_64128n_2x_VIKI_pb, &u8g_com_null_fn };
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_buf[WIDTH*2] U8G_NOCOMMON ;
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u8g_pb_t u8g_dev_st7565_64128n_2x_VIKI_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7565_64128n_2x_VIKI_buf};
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u8g_dev_t u8g_dev_st7565_64128n_2x_VIKI_sw_spi = { u8g_dev_st7565_64128n_2x_VIKI_fn, &u8g_dev_st7565_64128n_2x_VIKI_pb, &u8g_com_null_fn};
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class U8GLIB_ST7565_64128n_2x_VIKI : public U8GLIB {
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public:
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@ -236,6 +260,9 @@ class U8GLIB_ST7565_64128n_2x_VIKI : public U8GLIB {
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{ }
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};
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#pragma GCC reset_options
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#endif // U8GLIB_ST7565
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#endif // ULCDST7565_H
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@ -23,7 +23,9 @@
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#ifndef ULCDST7920_H
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#define ULCDST7920_H
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#include "../../Marlin.h"
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#include <src/Marlin.h>
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#if ENABLED(U8GLIB_ST7920)
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#define ST7920_CLK_PIN LCD_PINS_D4
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#define ST7920_DAT_PIN LCD_PINS_ENABLE
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@ -80,43 +82,63 @@
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#define ST7920_DELAY_3 CPU_ST7920_DELAY_3
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#endif
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#define ST7920_SND_BIT \
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WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
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WRITE(ST7920_DAT_PIN, val & 0x80); ST7920_DELAY_2; \
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WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
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val <<= 1
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static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
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ST7920_SND_BIT; // 1
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ST7920_SND_BIT; // 2
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ST7920_SND_BIT; // 3
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ST7920_SND_BIT; // 4
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ST7920_SND_BIT; // 5
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ST7920_SND_BIT; // 6
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ST7920_SND_BIT; // 7
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ST7920_SND_BIT; // 8
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}
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#if defined(DOGM_SPI_DELAY_US) && DOGM_SPI_DELAY_US > 0
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#define U8G_DELAY() delayMicroseconds(DOGM_SPI_DELAY_US)
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#else
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#define U8G_DELAY() u8g_10MicroDelay()
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#endif
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#if ENABLED(SHARED_SPI) // Re-ARM requires that the LCD and the SD card share a single SPI
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#define ST7920_SET_CMD() { spiSend(0xF8); U8G_DELAY(); }
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#define ST7920_SET_DAT() { spiSend(0xFA); U8G_DELAY(); }
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#define ST7920_WRITE_BYTE(a) { spiSend((uint8_t)((a)&0xF0u)); U8G_DELAY(); spiSend((uint8_t)((a)<<4u)); U8G_DELAY(); }
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#define ST7920_WRITE_BYTES(p,l) { for (uint8_t i = l + 1; --i;) { spiSend(*p&0xF0); spiSend(*p<<4); p++; } U8G_DELAY(); }
|
||||
|
||||
#else
|
||||
|
||||
#define ST7920_SND_BIT \
|
||||
WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
|
||||
WRITE(ST7920_DAT_PIN, val & 0x80); ST7920_DELAY_2; \
|
||||
WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
|
||||
val <<= 1
|
||||
|
||||
static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
|
||||
ST7920_SND_BIT; // 1
|
||||
ST7920_SND_BIT; // 2
|
||||
ST7920_SND_BIT; // 3
|
||||
ST7920_SND_BIT; // 4
|
||||
ST7920_SND_BIT; // 5
|
||||
ST7920_SND_BIT; // 6
|
||||
ST7920_SND_BIT; // 7
|
||||
ST7920_SND_BIT; // 8
|
||||
}
|
||||
|
||||
#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xF8); U8G_DELAY(); }
|
||||
#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xFA); U8G_DELAY(); }
|
||||
#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xF0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4u)); U8G_DELAY(); }
|
||||
#define ST7920_WRITE_BYTES(p,l) { for (uint8_t i = l + 1; --i;) { ST7920_SWSPI_SND_8BIT(*p&0xF0); ST7920_SWSPI_SND_8BIT(*p<<4); p++; } U8G_DELAY(); }
|
||||
#endif
|
||||
|
||||
#define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); }
|
||||
#define ST7920_NCS() { WRITE(ST7920_CS_PIN,0); }
|
||||
#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xF8); U8G_DELAY(); }
|
||||
#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xFA); U8G_DELAY(); }
|
||||
#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xF0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4u)); U8G_DELAY(); }
|
||||
#define ST7920_WRITE_BYTES(p,l) { for (uint8_t i = l + 1; --i;) { ST7920_SWSPI_SND_8BIT(*p&0xF0); ST7920_SWSPI_SND_8BIT(*p<<4); p++; } U8G_DELAY(); }
|
||||
|
||||
|
||||
|
||||
uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
||||
uint8_t i, y;
|
||||
switch (msg) {
|
||||
case U8G_DEV_MSG_INIT: {
|
||||
OUT_WRITE(ST7920_CS_PIN, LOW);
|
||||
OUT_WRITE(ST7920_DAT_PIN, LOW);
|
||||
OUT_WRITE(ST7920_CLK_PIN, HIGH);
|
||||
|
||||
#if ENABLED(SHARED_SPI)
|
||||
u8g_Delay(250);
|
||||
spiBegin();
|
||||
spiInit(SPI_EIGHTH_SPEED); // run LCD at 1 MHz - garbled display if run at 2 MHz
|
||||
#else
|
||||
OUT_WRITE(ST7920_DAT_PIN, LOW);
|
||||
OUT_WRITE(ST7920_CLK_PIN, HIGH);
|
||||
#endif
|
||||
|
||||
ST7920_CS();
|
||||
u8g_Delay(120); //initial delay for boot up
|
||||
@ -133,13 +155,23 @@ uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
|
||||
ST7920_WRITE_BYTE(0);
|
||||
ST7920_SET_CMD();
|
||||
}
|
||||
|
||||
ST7920_WRITE_BYTE(0x0C); //display on, cursor+blink off
|
||||
#if ENABLED(SHARED_SPI)
|
||||
#ifndef SPI_SPEED
|
||||
#define SPI_SPEED SPI_FULL_SPEED // switch SPI speed back to SD card speed
|
||||
#endif
|
||||
spiInit(SPI_SPEED);
|
||||
#endif
|
||||
ST7920_NCS();
|
||||
}
|
||||
break;
|
||||
case U8G_DEV_MSG_STOP:
|
||||
break;
|
||||
case U8G_DEV_MSG_PAGE_NEXT: {
|
||||
#if ENABLED(SHARED_SPI)
|
||||
spiInit(SPI_EIGHTH_SPEED); // run LCD at 1 MHz - garbled display if run at 2 MHz
|
||||
#endif
|
||||
uint8_t* ptr;
|
||||
u8g_pb_t* pb = (u8g_pb_t*)(dev->dev_mem);
|
||||
y = pb->p.page_y0;
|
||||
@ -160,6 +192,9 @@ uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, vo
|
||||
ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); //ptr is incremented inside of macro
|
||||
y++;
|
||||
}
|
||||
#if ENABLED(SHARED_SPI)
|
||||
spiInit(SPI_SPEED); // switch SPI speed back to SD card speed
|
||||
#endif
|
||||
ST7920_NCS();
|
||||
}
|
||||
break;
|
||||
@ -184,4 +219,5 @@ class U8GLIB_ST7920_128X64_RRD : public U8GLIB {
|
||||
|
||||
#pragma GCC reset_options
|
||||
|
||||
#endif // U8GLIB_ST7920
|
||||
#endif // ULCDST7920_H
|
||||
|
||||
Reference in New Issue
Block a user