New HardwareTimer for STM32 5.7.0 (#15655)
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committed by
Scott Lahteine
parent
4762dfe797
commit
ac71cdc265
@ -53,7 +53,7 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
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FTM0_SC = 0x00; // Set this to zero before changing the modulus
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FTM0_CNT = 0x0000; // Reset the count to zero
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FTM0_MOD = 0xFFFF; // max modulus = 65535
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FTM0_C0V = FTM0_TIMER_RATE / frequency; // Initial FTM Channel 0 compare value
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FTM0_C0V = (FTM0_TIMER_RATE) / frequency; // Initial FTM Channel 0 compare value
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FTM0_SC = (FTM_SC_CLKS(0b1) & FTM_SC_CLKS_MASK) | (FTM_SC_PS(FTM0_TIMER_PRESCALE_BITS) & FTM_SC_PS_MASK); // Bus clock 60MHz divided by prescaler 8
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FTM0_C0SC = FTM_CSC_CHIE | FTM_CSC_MSA | FTM_CSC_ELSA;
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break;
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@ -62,7 +62,7 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
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FTM1_SC = 0x00; // Set this to zero before changing the modulus
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FTM1_CNT = 0x0000; // Reset the count to zero
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FTM1_MOD = 0xFFFF; // max modulus = 65535
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FTM1_C0V = FTM1_TIMER_RATE / frequency; // Initial FTM Channel 0 compare value 65535
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FTM1_C0V = (FTM1_TIMER_RATE) / frequency; // Initial FTM Channel 0 compare value 65535
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FTM1_SC = (FTM_SC_CLKS(0b1) & FTM_SC_CLKS_MASK) | (FTM_SC_PS(FTM1_TIMER_PRESCALE_BITS) & FTM_SC_PS_MASK); // Bus clock 60MHz divided by prescaler 4
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FTM1_C0SC = FTM_CSC_CHIE | FTM_CSC_MSA | FTM_CSC_ELSA;
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break;
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