Batch appercase hex values

This commit is contained in:
Scott Lahteine
2020-10-09 16:50:17 -05:00
committed by Scott Lahteine
parent 3facf34f5f
commit 7e09160ba3
106 changed files with 7192 additions and 7192 deletions

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@ -78,16 +78,16 @@ typedef MAX3421e<P10, P9> MAX3421E; // Official Arduinos (UNO, Duemilanove, Mega
#define USB_CLASS_PRINTER 0x07 // Printer
#define USB_CLASS_MASS_STORAGE 0x08 // Mass Storage
#define USB_CLASS_HUB 0x09 // Hub
#define USB_CLASS_CDC_DATA 0x0a // CDC-Data
#define USB_CLASS_SMART_CARD 0x0b // Smart-Card
#define USB_CLASS_CONTENT_SECURITY 0x0d // Content Security
#define USB_CLASS_VIDEO 0x0e // Video
#define USB_CLASS_PERSONAL_HEALTH 0x0f // Personal Healthcare
#define USB_CLASS_DIAGNOSTIC_DEVICE 0xdc // Diagnostic Device
#define USB_CLASS_WIRELESS_CTRL 0xe0 // Wireless Controller
#define USB_CLASS_MISC 0xef // Miscellaneous
#define USB_CLASS_APP_SPECIFIC 0xfe // Application Specific
#define USB_CLASS_VENDOR_SPECIFIC 0xff // Vendor Specific
#define USB_CLASS_CDC_DATA 0x0A // CDC-Data
#define USB_CLASS_SMART_CARD 0x0B // Smart-Card
#define USB_CLASS_CONTENT_SECURITY 0x0D // Content Security
#define USB_CLASS_VIDEO 0x0E // Video
#define USB_CLASS_PERSONAL_HEALTH 0x0F // Personal Healthcare
#define USB_CLASS_DIAGNOSTIC_DEVICE 0xDC // Diagnostic Device
#define USB_CLASS_WIRELESS_CTRL 0xE0 // Wireless Controller
#define USB_CLASS_MISC 0xEF // Miscellaneous
#define USB_CLASS_APP_SPECIFIC 0xFE // Application Specific
#define USB_CLASS_VENDOR_SPECIFIC 0xFF // Vendor Specific
// Additional Error Codes
#define USB_DEV_CONFIG_ERROR_DEVICE_NOT_SUPPORTED 0xD1
@ -117,7 +117,7 @@ typedef MAX3421e<P10, P9> MAX3421E; // Official Arduinos (UNO, Duemilanove, Mega
#define HUB_PORT_RESET_DELAY 20 // hub port reset delay 10 ms recomended, can be up to 20 ms
/* USB state machine states */
#define USB_STATE_MASK 0xf0
#define USB_STATE_MASK 0xF0
#define USB_STATE_DETACHED 0x10
#define USB_DETACHED_SUBSTATE_INITIALIZE 0x11
@ -132,7 +132,7 @@ typedef MAX3421e<P10, P9> MAX3421E; // Official Arduinos (UNO, Duemilanove, Mega
#define USB_STATE_ADDRESSING 0x70
#define USB_STATE_CONFIGURING 0x80
#define USB_STATE_RUNNING 0x90
#define USB_STATE_ERROR 0xa0
#define USB_STATE_ERROR 0xA0
class USBDeviceConfig {
public:

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@ -52,16 +52,16 @@
#define BGRAB7(__usi__) (((uint8_t *)&(__usi__))[7])
#else
// Note: The cast alone to uint8_t is actually enough.
// GCC throws out the "& 0xff", and the size is no different.
// GCC throws out the "& 0xFF", and the size is no different.
// Some compilers need it.
#define BGRAB0(__usi__) ((uint8_t)((__usi__) & 0xff ))
#define BGRAB1(__usi__) ((uint8_t)(((__usi__) >> 8) & 0xff))
#define BGRAB2(__usi__) ((uint8_t)(((__usi__) >> 16) & 0xff))
#define BGRAB3(__usi__) ((uint8_t)(((__usi__) >> 24) & 0xff))
#define BGRAB4(__usi__) ((uint8_t)(((__usi__) >> 32) & 0xff))
#define BGRAB5(__usi__) ((uint8_t)(((__usi__) >> 40) & 0xff))
#define BGRAB6(__usi__) ((uint8_t)(((__usi__) >> 48) & 0xff))
#define BGRAB7(__usi__) ((uint8_t)(((__usi__) >> 56) & 0xff))
#define BGRAB0(__usi__) ((uint8_t)((__usi__) & 0xFF ))
#define BGRAB1(__usi__) ((uint8_t)(((__usi__) >> 8) & 0xFF))
#define BGRAB2(__usi__) ((uint8_t)(((__usi__) >> 16) & 0xFF))
#define BGRAB3(__usi__) ((uint8_t)(((__usi__) >> 24) & 0xFF))
#define BGRAB4(__usi__) ((uint8_t)(((__usi__) >> 32) & 0xFF))
#define BGRAB5(__usi__) ((uint8_t)(((__usi__) >> 40) & 0xFF))
#define BGRAB6(__usi__) ((uint8_t)(((__usi__) >> 48) & 0xFF))
#define BGRAB7(__usi__) ((uint8_t)(((__usi__) >> 56) & 0xFF))
#endif
#define BOVER1(__usi__) ((uint16_t)(__usi__) << 8)
#define BOVER2(__usi__) ((uint32_t)(__usi__) << 16)

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@ -439,7 +439,7 @@ uint8_t BulkOnly::Init(uint8_t parent __attribute__((unused)), uint8_t port __at
printf(" standards.\r\n");
#endif
uint8_t tries = 0xf0;
uint8_t tries = 0xF0;
while ((rcode = TestUnitReady(lun))) {
if (rcode == 0x08) break; // break on no media, this is OK to do.
// try to lock media and spin up
@ -765,7 +765,7 @@ uint8_t BulkOnly::Page3F(uint8_t lun) {
#ifdef SKIP_WRITE_PROTECT
return 0;
#endif
uint8_t rc = ModeSense6(lun, 0, 0x3f, 0, 192, buf);
uint8_t rc = ModeSense6(lun, 0, 0x3F, 0, 192, buf);
if (!rc) {
WriteOk[lun] = ((buf[2] & 0x80) == 0);
Notify(PSTR("Mode Sense: "), 0x80);
@ -1203,10 +1203,10 @@ uint8_t BulkOnly::Read(uint8_t lun __attribute__((unused)), uint32_t addr __attr
cbw.CBWCB[0] = SCSI_CMD_READ_10;
cbw.CBWCB[8] = blocks;
cbw.CBWCB[2] = ((addr >> 24) & 0xff);
cbw.CBWCB[3] = ((addr >> 16) & 0xff);
cbw.CBWCB[4] = ((addr >> 8) & 0xff);
cbw.CBWCB[5] = (addr & 0xff);
cbw.CBWCB[2] = ((addr >> 24) & 0xFF);
cbw.CBWCB[3] = ((addr >> 16) & 0xFF);
cbw.CBWCB[4] = ((addr >> 8) & 0xFF);
cbw.CBWCB[5] = (addr & 0xFF);
return HandleSCSIError(Transaction(&cbw, bsize, prs, 1));
#else

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@ -214,7 +214,7 @@ struct CDB6 {
public:
CDB6(uint8_t _Opcode, uint8_t _LUN, uint32_t LBA, uint8_t _AllocationLength, uint8_t _Control) :
Opcode(_Opcode), LBAMSB(BGRAB2(LBA) & 0x1f), LUN(_LUN), LBAHB(BGRAB1(LBA)), LBALB(BGRAB0(LBA)),
Opcode(_Opcode), LBAMSB(BGRAB2(LBA) & 0x1F), LUN(_LUN), LBAHB(BGRAB1(LBA)), LBALB(BGRAB0(LBA)),
AllocationLength(_AllocationLength), Control(_Control) {
}

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@ -86,7 +86,7 @@
#define rREVISION 0x90 //18<<3
#define rIOPINS1 0xa0 //20<<3
#define rIOPINS1 0xA0 //20<<3
/* IOPINS1 Bits */
#define bmGPOUT0 0x01
@ -98,7 +98,7 @@
#define bmGPIN2 0x40
#define bmGPIN3 0x80
#define rIOPINS2 0xa8 //21<<3
#define rIOPINS2 0xA8 //21<<3
/* IOPINS2 Bits */
#define bmGPOUT4 0x01
#define bmGPOUT5 0x02
@ -109,7 +109,7 @@
#define bmGPIN6 0x40
#define bmGPIN7 0x80
#define rGPINIRQ 0xb0 //22<<3
#define rGPINIRQ 0xB0 //22<<3
/* GPINIRQ Bits */
#define bmGPINIRQ0 0x01
#define bmGPINIRQ1 0x02
@ -120,7 +120,7 @@
#define bmGPINIRQ6 0x40
#define bmGPINIRQ7 0x80
#define rGPINIEN 0xb8 //23<<3
#define rGPINIEN 0xB8 //23<<3
/* GPINIEN Bits */
#define bmGPINIEN0 0x01
#define bmGPINIEN1 0x02
@ -131,7 +131,7 @@
#define bmGPINIEN6 0x40
#define bmGPINIEN7 0x80
#define rGPINPOL 0xc0 //24<<3
#define rGPINPOL 0xC0 //24<<3
/* GPINPOL Bits */
#define bmGPINPOL0 0x01
#define bmGPINPOL1 0x02
@ -142,7 +142,7 @@
#define bmGPINPOL6 0x40
#define bmGPINPOL7 0x80
#define rHIRQ 0xc8 //25<<3
#define rHIRQ 0xC8 //25<<3
/* HIRQ Bits */
#define bmBUSEVENTIRQ 0x01 // indicates BUS Reset Done or BUS Resume
#define bmRWUIRQ 0x02
@ -153,7 +153,7 @@
#define bmFRAMEIRQ 0x40
#define bmHXFRDNIRQ 0x80
#define rHIEN 0xd0 //26<<3
#define rHIEN 0xD0 //26<<3
/* HIEN Bits */
#define bmBUSEVENTIE 0x01
@ -165,7 +165,7 @@
#define bmFRAMEIE 0x40
#define bmHXFRDNIE 0x80
#define rMODE 0xd8 //27<<3
#define rMODE 0xD8 //27<<3
/* MODE Bits */
#define bmHOST 0x01
@ -177,9 +177,9 @@
#define bmDMPULLDN 0x40
#define bmDPPULLDN 0x80
#define rPERADDR 0xe0 //28<<3
#define rPERADDR 0xE0 //28<<3
#define rHCTL 0xe8 //29<<3
#define rHCTL 0xE8 //29<<3
/* HCTL Bits */
#define bmBUSRST 0x01
#define bmFRMRST 0x02
@ -190,7 +190,7 @@
#define bmSNDTOG0 0x40
#define bmSNDTOG1 0x80
#define rHXFR 0xf0 //30<<3
#define rHXFR 0xF0 //30<<3
#undef tokSETUP
#undef tokIN
@ -210,7 +210,7 @@
#define tokISOIN 0x40 // HS=0, ISO=1, OUTNIN=0, SETUP=0
#define tokISOOUT 0x60 // HS=0, ISO=1, OUTNIN=1, SETUP=0
#define rHRSL 0xf8 //31<<3
#define rHRSL 0xF8 //31<<3
/* HRSL Bits */
#define bmRCVTOGRD 0x10
@ -218,7 +218,7 @@
#define bmKSTATUS 0x40
#define bmJSTATUS 0x80
#define bmSE0 0x00 //SE0 - disconnect state
#define bmSE1 0xc0 //SE1 - illegal state
#define bmSE1 0xC0 //SE1 - illegal state
/* Host error result codes, the 4 LSB's in the HRSL register */
#define hrSUCCESS 0x00

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@ -34,7 +34,7 @@ template <class T>
void PrintHex(T val, int lvl) {
int num_nibbles = sizeof (T) * 2;
do {
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0f);
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0F);
if (v > 57) v += 7;
E_Notifyc(v, lvl);
} while (--num_nibbles);
@ -50,7 +50,7 @@ template <class T>
void SerialPrintHex(T val) {
int num_nibbles = sizeof (T) * 2;
do {
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0f);
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0F);
if (v > 57) v += 7;
USB_HOST_SERIAL.print(v);
} while (--num_nibbles);

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@ -90,7 +90,7 @@ uint8_t* MAX3421e::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* data_p) {
// GPIN pins are in high nybbles of IOPINS1, IOPINS2
uint8_t MAX3421e::gpioRd() {
return (regRd(rIOPINS2) & 0xf0) | // pins 4-7, clean lower nybble
return (regRd(rIOPINS2) & 0xF0) | // pins 4-7, clean lower nybble
(regRd(rIOPINS1) >> 4); // shift low bits and OR with upper from previous operation.
}

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@ -453,9 +453,9 @@ uint8_t UHS_NI UHS_Bulk_Storage::Start() {
for(uint8_t lun = 0; lun <= bMaxLUN; lun++) {
if(!UHS_SLEEP_MS(3)) goto FailUnPlug;
#ifndef USB_NO_TEST_UNIT_READY
uint8_t tries = 0xf0;
uint8_t tries = 0xF0;
while((rcode = TestUnitReady(lun))) {
BS_HOST_DEBUG("\r\nTry %2.2x TestUnitReady %2.2x\r\n", tries - 0xf0, rcode);
BS_HOST_DEBUG("\r\nTry %2.2x TestUnitReady %2.2x\r\n", tries - 0xF0, rcode);
if(rcode == 0x08) break; // break on no media, this is OK to do.
if(rcode == UHS_BULK_ERR_DEVICE_DISCONNECTED) goto FailUnPlug;
if(rcode == UHS_BULK_ERR_INVALID_CSW) goto Fail;
@ -475,7 +475,7 @@ uint8_t UHS_NI UHS_Bulk_Storage::Start() {
if(!UHS_SLEEP_MS(3)) goto FailUnPlug;
if(MediaCTL(lun, 1) == UHS_BULK_ERR_DEVICE_DISCONNECTED) goto FailUnPlug; // I actually have a USB stick that needs this!
}
BS_HOST_DEBUG("\r\nTry %2.2x TestUnitReady %2.2x\r\n", tries - 0xf0, rcode);
BS_HOST_DEBUG("\r\nTry %2.2x TestUnitReady %2.2x\r\n", tries - 0xF0, rcode);
if(!rcode) {
if(!UHS_SLEEP_MS(3)) goto FailUnPlug;
BS_HOST_DEBUG("CheckLUN...\r\n");
@ -579,7 +579,7 @@ bool UHS_NI UHS_Bulk_Storage::CheckLUN(uint8_t lun) {
CurrentCapacity[lun] = UHS_BYTES_TO_UINT32(capacity.data[0], capacity.data[1], capacity.data[2], capacity.data[3]) + 1;
if(CurrentCapacity[lun] == /*0xffffffffLU */ 0x01LU || CurrentCapacity[lun] == 0x00LU) {
// Buggy firmware will report 0xffffffff or 0 for no media
// Buggy firmware will report 0xFFFFFFFF or 0 for no media
#ifdef DEBUG_USB_HOST
if(CurrentCapacity[lun])
ErrorMessage<uint8_t > (PSTR(">>>>>>>>>>>>>>>>BUGGY FIRMWARE. CAPACITY FAIL ON LUN"), lun);
@ -756,7 +756,7 @@ uint8_t UHS_NI UHS_Bulk_Storage::Page3F(uint8_t lun) {
buf[i] = 0x00;
}
WriteOk[lun] = true;
uint8_t rc = ModeSense6(lun, 0, 0x3f, 0, 192, buf);
uint8_t rc = ModeSense6(lun, 0, 0x3F, 0, 192, buf);
if(!rc) {
WriteOk[lun] = ((buf[2] & 0x80) == 0);
#ifdef DEBUG_USB_HOST

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@ -146,7 +146,7 @@ struct SCSI_CDB6 {
public:
SCSI_CDB6(uint8_t _Opcode, uint8_t _LUN, uint32_t LBA, uint8_t _AllocationLength, uint8_t _Control) :
Opcode(_Opcode), LBAMSB(UHS_UINT8_BYTE2(LBA) & 0x1f), LUN(_LUN), LBAHB(UHS_UINT8_BYTE1(LBA)), LBALB(UHS_UINT8_BYTE0(LBA)),
Opcode(_Opcode), LBAMSB(UHS_UINT8_BYTE2(LBA) & 0x1F), LUN(_LUN), LBAHB(UHS_UINT8_BYTE1(LBA)), LBALB(UHS_UINT8_BYTE0(LBA)),
AllocationLength(_AllocationLength), Control(_Control) {
}

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@ -189,8 +189,8 @@ e-mail : support@circuitsathome.com
#define UHS_USB_HOST_STATE_INITIALIZE 0x10U // Looks like "I"nit
// Host SE result codes.
// Common SE results are stored in the low nybble, all interface drivers understand these plus 0x1f.
// Extended SE results are 0x10-0x1e. SE code only understands these internal to the hardware.
// Common SE results are stored in the low nybble, all interface drivers understand these plus 0x1F.
// Extended SE results are 0x10-0x1E. SE code only understands these internal to the hardware.
// Values > 0x1F are driver or other internal error conditions.
// Return these result codes from your host controller driver to match the error condition
// ALL Non-zero values are errors.

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@ -1005,7 +1005,7 @@ uint8_t UHS_USB_HOST_BASE::ctrlReq(uint8_t addr, uint64_t Request, uint16_t nbyt
rcode = ctrlReqRead(pep, &left, &read, nbytes, dataptr);
#if UHS_DEVICE_WINDOWS_USB_SPEC_VIOLATION_DESCRIPTOR_DEVICE
HOST_DEBUG("RESULT: 0x%2.2x 0x%2.2x 0x%2.2x 0x%8.8lx%8.8lx\r\n", rcode, addr, read, (uint32_t)((Request>>32)&0xfffffffflu), (uint32_t)(Request&0xfffffffflu));
HOST_DEBUG("RESULT: 0x%2.2x 0x%2.2x 0x%2.2x 0x%8.8lx%8.8lx\r\n", rcode, addr, read, (uint32_t)((Request>>32)&0xFFFFFFFFLU), (uint32_t)(Request&0xFFFFFFFFLU));
// Should only be used for GET_DESCRIPTOR USB_DESCRIPTOR_DEVICE
constexpr uint32_t req_match = ((uint32_t)USB_DESCRIPTOR_DEVICE << 24) |
((uint32_t)USB_REQUEST_GET_DESCRIPTOR << 8);

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@ -343,16 +343,16 @@ e-mail : support@circuitsathome.com
#define UHS_UINT8_BYTE7(__usi__) (((uint8_t *)&(__usi__))[7])
#else
// Note: The cast alone to uint8_t is actually enough.
// GCC throws out the "& 0xff", and the size is no different.
// GCC throws out the "& 0xFF", and the size is no different.
// Some compilers need it.
#define UHS_UINT8_BYTE0(__usi__) ((uint8_t)((__usi__) & 0xff ))
#define UHS_UINT8_BYTE1(__usi__) ((uint8_t)(((__usi__) >> 8) & 0xff))
#define UHS_UINT8_BYTE2(__usi__) ((uint8_t)(((__usi__) >> 16) & 0xff))
#define UHS_UINT8_BYTE3(__usi__) ((uint8_t)(((__usi__) >> 24) & 0xff))
#define UHS_UINT8_BYTE4(__usi__) ((uint8_t)(((__usi__) >> 32) & 0xff))
#define UHS_UINT8_BYTE5(__usi__) ((uint8_t)(((__usi__) >> 40) & 0xff))
#define UHS_UINT8_BYTE6(__usi__) ((uint8_t)(((__usi__) >> 48) & 0xff))
#define UHS_UINT8_BYTE7(__usi__) ((uint8_t)(((__usi__) >> 56) & 0xff))
#define UHS_UINT8_BYTE0(__usi__) ((uint8_t)((__usi__) & 0xFF ))
#define UHS_UINT8_BYTE1(__usi__) ((uint8_t)(((__usi__) >> 8) & 0xFF))
#define UHS_UINT8_BYTE2(__usi__) ((uint8_t)(((__usi__) >> 16) & 0xFF))
#define UHS_UINT8_BYTE3(__usi__) ((uint8_t)(((__usi__) >> 24) & 0xFF))
#define UHS_UINT8_BYTE4(__usi__) ((uint8_t)(((__usi__) >> 32) & 0xFF))
#define UHS_UINT8_BYTE5(__usi__) ((uint8_t)(((__usi__) >> 40) & 0xFF))
#define UHS_UINT8_BYTE6(__usi__) ((uint8_t)(((__usi__) >> 48) & 0xFF))
#define UHS_UINT8_BYTE7(__usi__) ((uint8_t)(((__usi__) >> 56) & 0xFF))
#endif
#define UHS_UINT16_SET_BYTE1(__usi__) ((uint16_t)(__usi__) << 8)
#define UHS_UINT32_SET_BYTE1(__usi__) ((uint32_t)(__usi__) << 8)

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@ -36,7 +36,7 @@ void PrintHex(T val, int lvl) {
int num_nibbles = sizeof (T) * 2;
do {
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0f);
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0F);
if(v > 57) v += 7;
E_Notifyc(v, lvl);
} while(--num_nibbles);
@ -56,7 +56,7 @@ void SerialPrintHex(T val) {
int num_nibbles = sizeof (T) * 2;
do {
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0f);
char v = 48 + (((val >> (num_nibbles - 1) * 4)) & 0x0F);
if(v > 57) v += 7;
USB_HOST_SERIAL.print(v);
} while(--num_nibbles);

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@ -108,12 +108,12 @@ e-mail : support@circuitsathome.com
#define USB_DESCRIPTOR_OTHER_SPEED 0x07 // bDescriptorType for a Other Speed Configuration.
#define USB_DESCRIPTOR_INTERFACE_POWER 0x08 // bDescriptorType for Interface Power.
#define USB_DESCRIPTOR_OTG 0x09 // bDescriptorType for an OTG Descriptor.
#define USB_DESCRIPTOR_DEBUG 0x0a
#define USB_DESCRIPTOR_INTERFACE_ASSOCIATION 0x0b
#define USB_DESCRIPTOR_SECURITY 0x0c
#define USB_DESCRIPTOR_KEY 0x0d
#define USB_DESCRIPTOR_ENCRYPTION_TYPE 0x0e
#define USB_DESCRIPTOR_BOS 0x0f
#define USB_DESCRIPTOR_DEBUG 0x0A
#define USB_DESCRIPTOR_INTERFACE_ASSOCIATION 0x0B
#define USB_DESCRIPTOR_SECURITY 0x0C
#define USB_DESCRIPTOR_KEY 0x0D
#define USB_DESCRIPTOR_ENCRYPTION_TYPE 0x0E
#define USB_DESCRIPTOR_BOS 0x0F
#define USB_DESCRIPTOR_DEVICE_CAPABILITY 0x10
#define USB_DESCRIPTOR_WIRELESS_ENDPOINT_COMP 0x11
#define USB_DESCRIPTOR_WIRE_ADAPTER 0x21

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@ -90,7 +90,7 @@ e-mail : support@circuitsathome.com
#define rREVISION 0x90 //18<<3
// (IOPINS1)
#define rIOPINS1 0xa0 //20<<3
#define rIOPINS1 0xA0 //20<<3
#define bmGPOUT0 0x01 //
#define bmGPOUT1 0x02 //
#define bmGPOUT2 0x04 //
@ -101,7 +101,7 @@ e-mail : support@circuitsathome.com
#define bmGPIN3 0x80 //
// (IOPINS2)
#define rIOPINS2 0xa8 //21<<3
#define rIOPINS2 0xA8 //21<<3
#define bmGPOUT4 0x01 //
#define bmGPOUT5 0x02 //
#define bmGPOUT6 0x04 //
@ -112,7 +112,7 @@ e-mail : support@circuitsathome.com
#define bmGPIN7 0x80 //
// (GPINIRQ)
#define rGPINIRQ 0xb0 //22<<3
#define rGPINIRQ 0xB0 //22<<3
#define bmGPINIRQ0 0x01 //
#define bmGPINIRQ1 0x02 //
#define bmGPINIRQ2 0x04 //
@ -123,7 +123,7 @@ e-mail : support@circuitsathome.com
#define bmGPINIRQ7 0x80 //
// (GPINIEN)
#define rGPINIEN 0xb8 //23<<3
#define rGPINIEN 0xB8 //23<<3
#define bmGPINIEN0 0x01 //
#define bmGPINIEN1 0x02 //
#define bmGPINIEN2 0x04 //
@ -134,7 +134,7 @@ e-mail : support@circuitsathome.com
#define bmGPINIEN7 0x80 //
// (GPINPOL)
#define rGPINPOL 0xc0 //24<<3
#define rGPINPOL 0xC0 //24<<3
#define bmGPINPOL0 0x01 //
#define bmGPINPOL1 0x02 //
#define bmGPINPOL2 0x04 //
@ -151,7 +151,7 @@ e-mail : support@circuitsathome.com
// The CPU should never directly clear the SNDBAVIRQ bit.
// Host Interrupt Request Status (HIRQ)
#define rHIRQ 0xc8 // Host Interrupt Request Register
#define rHIRQ 0xC8 // Host Interrupt Request Register
#define bmBUSEVENTIRQ 0x01 // BUS Reset Done or BUS Resume Interrupt Request
#define bmRWUIRQ 0x02 // Remote Wakeup Interrupt Request
#define bmRCVDAVIRQ 0x04 // Receive FIFO Data Available Interrupt Request
@ -165,7 +165,7 @@ e-mail : support@circuitsathome.com
#define ICLRALLBITS (bmBUSEVENTIRQ | bmRWUIRQ | bmRCVDAVIRQ | bmSUSDNIRQ | bmCONDETIRQ | bmFRAMEIRQ | bmHXFRDNIRQ)
// Host Interrupt Request Control (HIEN)
#define rHIEN 0xd0 //
#define rHIEN 0xD0 //
#define bmBUSEVENTIE bmBUSEVENTIRQ // BUS Reset Done or BUS Resume Interrupt Request Enable
#define bmRWUIE bmRWUIRQ // Remote Wakeup Interrupt Request Enable
#define bmRCVDAVIE bmRCVDAVIRQ // Receive FIFO Data Available Interrupt Request Enable
@ -176,7 +176,7 @@ e-mail : support@circuitsathome.com
#define bmHXFRDNIE bmHXFRDNIRQ // Host Transfer Done Interrupt Request Enable
// (MODE))
#define rMODE 0xd8 //27<<3
#define rMODE 0xD8 //27<<3
#define bmHOST 0x01 //
#define bmLOWSPEED 0x02 //
#define bmHUBPRE 0x04 //
@ -186,10 +186,10 @@ e-mail : support@circuitsathome.com
#define bmDMPULLDN 0x40 //
#define bmDPPULLDN 0x80 //
#define rPERADDR 0xe0 //28<<3
#define rPERADDR 0xE0 //28<<3
// (HCTL)
#define rHCTL 0xe8 //29<<3
#define rHCTL 0xE8 //29<<3
#define bmBUSRST 0x01 //
#define bmFRMRST 0x02 //
#define bmSAMPLEBUS 0x04 //
@ -200,7 +200,7 @@ e-mail : support@circuitsathome.com
#define bmSNDTOG1 0x80 //
// Host transfer (HXFR)
#define rHXFR 0xf0 //30<<3
#define rHXFR 0xF0 //30<<3
/* Host transfer token values for writing the HXFR register (R30) */
/* OR this bit field with the endpoint number in bits 3:0 */
#define MAX3421E_tokSETUP 0x10 // HS=0, ISO=0, OUTNIN=0, SETUP=1
@ -212,13 +212,13 @@ e-mail : support@circuitsathome.com
#define MAX3421E_tokISOOUT 0x60 // HS=0, ISO=1, OUTNIN=1, SETUP=0
// (HRSL)
#define rHRSL 0xf8 //31<<3
#define rHRSL 0xF8 //31<<3
#define bmRCVTOGRD 0x10 //
#define bmSNDTOGRD 0x20 //
#define bmKSTATUS 0x40 //
#define bmJSTATUS 0x80 //
#define bmSE0 0x00 //SE0 - disconnect state
#define bmSE1 0xc0 //SE1 - illegal state
#define bmSE1 0xC0 //SE1 - illegal state
#define MODE_FS_HOST (bmDPPULLDN|bmDMPULLDN|bmHOST|bmSOFKAENAB)
#define MODE_LS_HOST (bmDPPULLDN|bmDMPULLDN|bmHOST|bmLOWSPEED|bmSOFKAENAB)

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@ -136,7 +136,7 @@ uint8_t* UHS_NI MAX3421E_HOST::bytesRd(uint8_t reg, uint8_t nbytes, uint8_t* dat
uint8_t UHS_NI MAX3421E_HOST::gpioRd() {
uint8_t gpin = 0;
gpin = regRd(rIOPINS2); //pins 4-7
gpin &= 0xf0; //clean lower nibble
gpin &= 0xF0; //clean lower nibble
gpin |= (regRd(rIOPINS1) >> 4); //shift low bits and OR with upper from previous operation.
return ( gpin);
}
@ -504,7 +504,7 @@ uint8_t UHS_NI MAX3421E_HOST::InTransfer(UHS_EpInfo *pep, uint16_t nak_limit, ui
/* the only case when absence of RCVDAVIRQ makes sense is when toggle error occurred. Need to add handling for that */
if((regRd(rHIRQ) & bmRCVDAVIRQ) == 0) {
//MAX_HOST_DEBUG(PSTR(">>>>>>>> Problem! NO RCVDAVIRQ!\r\n"));
rcode = 0xf0; //receive error
rcode = 0xF0; //receive error
break;
}
pktsize = regRd(rRCVBC); //number of received bytes
@ -576,7 +576,7 @@ uint8_t UHS_NI MAX3421E_HOST::OutTransfer(UHS_EpInfo *pep, uint16_t nak_limit, u
regWr(rHXFR, (MAX3421E_tokOUT | pep->epAddr)); //dispatch packet
while(!(regRd(rHIRQ) & bmHXFRDNIRQ)); //wait for the completion IRQ
regWr(rHIRQ, bmHXFRDNIRQ); //clear IRQ
rcode = (regRd(rHRSL) & 0x0f);
rcode = (regRd(rHRSL) & 0x0F);
while(rcode && ((long)(millis() - timeout) < 0L)) {
switch(rcode) {
@ -606,7 +606,7 @@ uint8_t UHS_NI MAX3421E_HOST::OutTransfer(UHS_EpInfo *pep, uint16_t nak_limit, u
regWr(rHXFR, (MAX3421E_tokOUT | pep->epAddr)); //dispatch packet
while(!(regRd(rHIRQ) & bmHXFRDNIRQ)); //wait for the completion IRQ
regWr(rHIRQ, bmHXFRDNIRQ); //clear IRQ
rcode = (regRd(rHRSL) & 0x0f);
rcode = (regRd(rHRSL) & 0x0F);
SYSTEM_OR_SPECIAL_YIELD();
}//while( rcode && ....
bytes_left -= bytes_tosend;
@ -631,7 +631,7 @@ breakout:
/* If nak_limit == 0, do not count NAKs, exit after timeout */
/* If bus timeout, re-sends up to USB_RETRY_LIMIT times */
/* return codes 0x00-0x0f are HRSLT( 0x00 being success ), 0xff means timeout */
/* return codes 0x00-0x0F are HRSLT( 0x00 being success ), 0xFF means timeout */
uint8_t UHS_NI MAX3421E_HOST::dispatchPkt(uint8_t token, uint8_t ep, uint16_t nak_limit) {
unsigned long timeout = millis() + UHS_HOST_TRANSFER_MAX_MS;
uint8_t tmpdata;
@ -654,7 +654,7 @@ uint8_t UHS_NI MAX3421E_HOST::dispatchPkt(uint8_t token, uint8_t ep, uint16_t na
}//while ( millis() < timeout
rcode = (regRd(rHRSL) & 0x0f); //analyze transfer result
rcode = (regRd(rHRSL) & 0x0F); //analyze transfer result
switch(rcode) {
case UHS_HOST_ERROR_NAK:

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@ -75,7 +75,7 @@ extern "C"
#define NVIC_NUM_INTERRUPTS ((int)PERIPH_COUNT_IRQn)
#endif
#define VECTORTABLE_SIZE (NVIC_NUM_INTERRUPTS+16)
#define VECTORTABLE_ALIGNMENT (0x100ul)
#define VECTORTABLE_ALIGNMENT (0x100UL)
#define NVIC_GET_ACTIVE(n) NVIC_GetActive((IRQn_Type)n)
#define NVIC_GET_PENDING(n) NVIC_GetPendingIRQ((IRQn_Type)n)
#define NVIC_SET_PENDING(n) NVIC_SetPendingIRQ((IRQn_Type)n)