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🎨 Pins and SDIO cleanup

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This commit is contained in:
Scott Lahteine
2021-12-26 03:20:29 -06:00
committed by Scott Lahteine
parent c9561a8826
commit 61b9248c35
7 changed files with 209 additions and 251 deletions
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10
Marlin/src/HAL/STM32/Sd2Card_sdio_stm32duino.cpp → Marlin/src/HAL/STM32/sdio.cpp
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@@ -28,6 +28,8 @@
#if ENABLED(SDIO_SUPPORT) #if ENABLED(SDIO_SUPPORT)
#include "sdio.h"
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
@@ -49,14 +51,6 @@
#error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, or STM32F7xx." #error "SDIO only supported with STM32F103xE, STM32F103xG, STM32F4xx, or STM32F7xx."
#endif #endif
// Fixed
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2
SD_HandleTypeDef hsd; // create SDIO structure SD_HandleTypeDef hsd; // create SDIO structure
// F4 supports one DMA for RX and another for TX, but Marlin will never // F4 supports one DMA for RX and another for TX, but Marlin will never
// do read and write at same time, so we use the same DMA for both. // do read and write at same time, so we use the same DMA for both.

29
Marlin/src/HAL/STM32/sdio.h Normal file
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@@ -0,0 +1,29 @@
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#pragma once
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2

15
Marlin/src/pins/stm32f4/pins_ANET_ET4.h
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@@ -203,19 +203,12 @@
#if ENABLED(SDSUPPORT) #if ENABLED(SDSUPPORT)
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2
#if DISABLED(SDIO_SUPPORT) #if DISABLED(SDIO_SUPPORT)
#define SOFTWARE_SPI #define SOFTWARE_SPI
#define SDSS SDIO_D3_PIN #define SDSS PC11
#define SD_SCK_PIN SDIO_CK_PIN #define SD_SCK_PIN PC12
#define SD_MISO_PIN SDIO_D0_PIN #define SD_MISO_PIN PC8
#define SD_MOSI_PIN SDIO_CMD_PIN #define SD_MOSI_PIN PD2
#endif #endif
#ifndef SD_DETECT_PIN #ifndef SD_DETECT_PIN

18
Marlin/src/pins/stm32f4/pins_BLACK_STM32F407VE.h
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@@ -140,25 +140,17 @@
// //
// Onboard SD support // Onboard SD support
// //
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2
#ifndef SDCARD_CONNECTION #ifndef SDCARD_CONNECTION
#define SDCARD_CONNECTION ONBOARD #define SDCARD_CONNECTION ONBOARD
#endif #endif
#if SD_CONNECTION_IS(ONBOARD) #if SD_CONNECTION_IS(ONBOARD)
#define SDIO_SUPPORT // Use SDIO for onboard SD #define SDIO_SUPPORT // Use SDIO for onboard SD
#if DISABLED(SDIO_SUPPORT)
#ifndef SDIO_SUPPORT
#define SOFTWARE_SPI // Use soft SPI for onboard SD #define SOFTWARE_SPI // Use soft SPI for onboard SD
#define SDSS SDIO_D3_PIN #define SDSS PC11
#define SD_SCK_PIN SDIO_CK_PIN #define SD_SCK_PIN PC12
#define SD_MISO_PIN SDIO_D0_PIN #define SD_MISO_PIN PC8
#define SD_MOSI_PIN SDIO_CMD_PIN #define SD_MOSI_PIN PD2
#endif #endif
#endif #endif

7
Marlin/src/pins/stm32f4/pins_BTT_E3_RRF.h
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@@ -338,13 +338,6 @@
#if SD_CONNECTION_IS(ONBOARD) #if SD_CONNECTION_IS(ONBOARD)
#define SDIO_SUPPORT // Use SDIO for onboard SD #define SDIO_SUPPORT // Use SDIO for onboard SD
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2
//#define SDIO_CLOCK 48000000 //#define SDIO_CLOCK 48000000
#define SD_DETECT_PIN PC4 #define SD_DETECT_PIN PC4
#elif SD_CONNECTION_IS(CUSTOM_CABLE) #elif SD_CONNECTION_IS(CUSTOM_CABLE)

10
Marlin/src/pins/stm32f4/pins_BTT_SKR_V2_0_common.h
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@@ -365,24 +365,14 @@
// Must use soft SPI because Marlin's default hardware SPI is tied to LCD's EXP2 // Must use soft SPI because Marlin's default hardware SPI is tied to LCD's EXP2
// //
#if SD_CONNECTION_IS(LCD) #if SD_CONNECTION_IS(LCD)
#define SDSS EXP2_07_PIN #define SDSS EXP2_07_PIN
#define SD_SS_PIN SDSS #define SD_SS_PIN SDSS
#define SD_SCK_PIN EXP2_09_PIN #define SD_SCK_PIN EXP2_09_PIN
#define SD_MISO_PIN EXP2_10_PIN #define SD_MISO_PIN EXP2_10_PIN
#define SD_MOSI_PIN EXP2_05_PIN #define SD_MOSI_PIN EXP2_05_PIN
#define SD_DETECT_PIN EXP2_04_PIN #define SD_DETECT_PIN EXP2_04_PIN
#elif SD_CONNECTION_IS(ONBOARD) #elif SD_CONNECTION_IS(ONBOARD)
#define SDIO_SUPPORT // Use SDIO for onboard SD #define SDIO_SUPPORT // Use SDIO for onboard SD
#define SDIO_D0_PIN PC8
#define SDIO_D1_PIN PC9
#define SDIO_D2_PIN PC10
#define SDIO_D3_PIN PC11
#define SDIO_CK_PIN PC12
#define SDIO_CMD_PIN PD2
#elif SD_CONNECTION_IS(CUSTOM_CABLE) #elif SD_CONNECTION_IS(CUSTOM_CABLE)
#error "No custom SD drive cable defined for this board." #error "No custom SD drive cable defined for this board."
#endif #endif

371
Marlin/src/pins/stm32f4/pins_STEVAL_3DP001V1.h
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@@ -48,82 +48,82 @@
// //
// Limit Switches // Limit Switches
// //
#define X_MIN_PIN 39 // PD8 X_STOP #define X_MIN_PIN PD8 // X_STOP
#define Y_MIN_PIN 40 // PD9 Y_STOP #define Y_MIN_PIN PD9 // Y_STOP
#define Z_MIN_PIN 41 // PD10 Z_STOP #define Z_MIN_PIN PD10 // Z_STOP
#define X_MAX_PIN 44 // PD0 W_STOP #define X_MAX_PIN PD0 // W_STOP
#define Y_MAX_PIN 43 // PA8 V_STOP #define Y_MAX_PIN PA8 // V_STOP
#define Z_MAX_PIN 42 // PD11 U_STOP #define Z_MAX_PIN PD11 // U_STOP
// //
// Z Probe (when not Z_MIN_PIN) // Z Probe (when not Z_MIN_PIN)
// //
//#ifndef Z_MIN_PROBE_PIN //#ifndef Z_MIN_PROBE_PIN
// #define Z_MIN_PROBE_PIN 16 // PA4 // #define Z_MIN_PROBE_PIN PA4 // SPI1_CS
//#endif //#endif
// //
// Filament runout // Filament runout
// //
//#define FIL_RUNOUT_PIN 53 // PA3 BED_THE //#define FIL_RUNOUT_PIN PA3 // BED_THERMISTOR_3
// //
// Steppers // Steppers
// //
#define X_STEP_PIN 61 // PE14 X_PWM #define X_STEP_PIN PE14 // X_PWM
#define X_DIR_PIN 62 // PE15 X_DIR #define X_DIR_PIN PE15 // X_DIR
#define X_ENABLE_PIN 60 // PE13 X_RES #define X_ENABLE_PIN PE13 // X_RESET
#define X_CS_PIN 16 // PA4 SPI_CS #define X_CS_PIN PA4 // SPI1_CS
#define Y_STEP_PIN 64 // PB10 Y_PWM #define Y_STEP_PIN PB10 // Y_PWM
#define Y_DIR_PIN 65 // PE9 Y_DIR #define Y_DIR_PIN PE9 // Y_DIR
#define Y_ENABLE_PIN 63 // PE10 Y_RES #define Y_ENABLE_PIN PE10 // Y_RESET
#define Y_CS_PIN 16 // PA4 SPI_CS #define Y_CS_PIN PA4 // SPI1_CS
#define Z_STEP_PIN 67 // PC6 Z_PWM #define Z_STEP_PIN PC6 // Z_PWM
#define Z_DIR_PIN 68 // PC0 Z_DIR #define Z_DIR_PIN PC0 // Z_DIR
#define Z_ENABLE_PIN 66 // PC15 Z_RES #define Z_ENABLE_PIN PC15 // Z_RESET
#define Z_CS_PIN 16 // PA4 SPI_CS #define Z_CS_PIN PA4 // SPI1_CS
#define E0_STEP_PIN 71 // PD12 E1_PW #define E0_STEP_PIN PD12 // E1_PW
#define E0_DIR_PIN 70 // PC13 E1_DIR #define E0_DIR_PIN PC13 // E1_DIR
#define E0_ENABLE_PIN 69 // PC14 E1_RE #define E0_ENABLE_PIN PC14 // E1_RESET
#define E0_CS_PIN 16 // PA4 SPI_CS #define E0_CS_PIN PA4 // SPI1_CS
#define E1_STEP_PIN 73 // PE5 E2_PWM #define E1_STEP_PIN PE5 // E2_PWM
#define E1_DIR_PIN 74 // PE6 E2_DIR #define E1_DIR_PIN PE6 // E2_DIR
#define E1_ENABLE_PIN 72 // PE4 E2_RESE #define E1_ENABLE_PIN PE4 // E2_RESET
#define E1_CS_PIN 16 // PA4 SPI_CS #define E1_CS_PIN PA4 // SPI1_CS
#define E2_STEP_PIN 77 // PB8 E3_PWM #define E2_STEP_PIN PB8 // E3_PWM
#define E2_DIR_PIN 76 // PE2 E3_DIR #define E2_DIR_PIN PE2 // E3_DIR
#define E2_ENABLE_PIN 75 // PE3 E3_RESE #define E2_ENABLE_PIN PE3 // E3_RESET
#define E2_CS_PIN 16 // PA4 SPI_CS #define E2_CS_PIN PA4 // SPI1_CS
// needed to pass a sanity check // needed to pass a sanity check
#define X2_CS_PIN 16 // PA4 SPI_CS #define X2_CS_PIN PA4 // SPI1_CS
#define Y2_CS_PIN 16 // PA4 SPI_CS #define Y2_CS_PIN PA4 // SPI1_CS
#define Z2_CS_PIN 16 // PA4 SPI_CS #define Z2_CS_PIN PA4 // SPI1_CS
#define Z3_CS_PIN 16 // PA4 SPI_CS #define Z3_CS_PIN PA4 // SPI1_CS
#define E3_CS_PIN 16 // PA4 SPI_CS #define E3_CS_PIN PA4 // SPI1_CS
#define E4_CS_PIN 16 // PA4 SPI_CS #define E4_CS_PIN PA4 // SPI1_CS
#define E5_CS_PIN 16 // PA4 SPI_CS #define E5_CS_PIN PA4 // SPI1_CS
#if HAS_L64XX #if HAS_L64XX
#define L6470_CHAIN_SCK_PIN 17 // PA5 #define L6470_CHAIN_SCK_PIN PA5 // SPI1_SCK
#define L6470_CHAIN_MISO_PIN 18 // PA6 #define L6470_CHAIN_MISO_PIN PA6 // SPI1_MISO
#define L6470_CHAIN_MOSI_PIN 19 // PA7 #define L6470_CHAIN_MOSI_PIN PA7 // SPI1_MOSI
#define L6470_CHAIN_SS_PIN 16 // PA4 #define L6470_CHAIN_SS_PIN PA4 // SPI1_CS
//#define SD_SCK_PIN L6470_CHAIN_SCK_PIN //#define SD_SCK_PIN L6470_CHAIN_SCK_PIN
//#define SD_MISO_PIN L6470_CHAIN_MISO_PIN //#define SD_MISO_PIN L6470_CHAIN_MISO_PIN
//#define SD_MOSI_PIN L6470_CHAIN_MOSI_PIN //#define SD_MOSI_PIN L6470_CHAIN_MOSI_PIN
#else #else
//#define SD_SCK_PIN 13 // PB13 SPI_S //#define SD_SCK_PIN PB13 // SPI2_SCK
//#define SD_MISO_PIN 12 // PB14 SPI_M //#define SD_MISO_PIN PB14 // SPI2_MISO
//#define SD_MOSI_PIN 11 // PB15 SPI_M //#define SD_MOSI_PIN PB15 // SPI2_MOSI
#endif #endif
/** /**
@@ -144,215 +144,182 @@
// //
// Temperature Sensors // Temperature Sensors
// //
#define TEMP_0_PIN 3 // Analog input 3, digital pin 54 PA0 E1_THERMISTOR #define TEMP_0_PIN PA0 // Analog Input 3
#define TEMP_1_PIN 4 // Analog input 4, digital pin 55 PA1 E2_THERMISTOR #define TEMP_1_PIN PA1 // Analog Input 4
#define TEMP_2_PIN 5 // Analog input 5, digital pin 56 PA2 E3_THERMISTOR #define TEMP_2_PIN PA2 // Analog Input 5
#define TEMP_BED_PIN 0 // Analog input 0, digital pin 51 PC2 BED_THERMISTOR_1 #define TEMP_BED_PIN PC2 // Analog Input 0
#define TEMP_BED_1_PIN 1 // Analog input 1, digital pin 52 PC3 BED_THERMISTOR_2 #define TEMP_BED_1_PIN PC3 // Analog Input 1
#define TEMP_BED_2_PIN 2 // Analog input 2, digital pin 53 PA3 BED_THERMISTOR_3 #define TEMP_BED_2_PIN PA3 // Analog Input 2
// //
// Heaters / Fans // Heaters / Fans
// //
#define HEATER_0_PIN 48 // PC7 E1_HEAT_PWM #define HEATER_0_PIN PC7 // E1_HEAT_PWM
#define HEATER_1_PIN 49 // PB0 E2_HEAT_PWM #define HEATER_1_PIN PB0 // E2_HEAT_PWM
#define HEATER_2_PIN 50 // PB1 E3_HEAT_PWM #define HEATER_2_PIN PB1 // E3_HEAT_PWM
#define HEATER_BED_PIN 46 // PD14 (BED_HEAT_1 FET #define HEATER_BED_PIN PD14 // BED_HEAT_1 FET
#define HEATER_BED_1_PIN 45 // PD13 (BED_HEAT_2 FET #define HEATER_BED_1_PIN PD13 // BED_HEAT_2 FET
#define HEATER_BED_2_PIN 47 // PD15 (BED_HEAT_3 FET #define HEATER_BED_2_PIN PD15 // BED_HEAT_3 FET
#define FAN_PIN 57 // PC4 E1_FAN PWM pin, Part cooling fan FET #define FAN_PIN PC4 // E1_FAN PWM pin, Part cooling fan FET
#define FAN1_PIN 58 // PC5 E2_FAN PWM pin, Extruder fan FET #define FAN1_PIN PC5 // E2_FAN PWM pin, Extruder fan FET
#define FAN2_PIN 59 // PE8 E3_FAN PWM pin, Controller fan FET #define FAN2_PIN PE8 // E3_FAN PWM pin, Controller fan FET
#ifndef E0_AUTO_FAN_PIN #ifndef E0_AUTO_FAN_PIN
#define E0_AUTO_FAN_PIN 58 // FAN1_PIN #define E0_AUTO_FAN_PIN PC5 // FAN1_PIN
#endif #endif
// //
// Misc functions // Misc functions
// //
#define LED_PIN -1 // 9 // PE1 green LED Heart beat #define LED_PIN -1 // PE1 Green LED Heartbeat
#define PS_ON_PIN -1 #define PS_ON_PIN -1
#define KILL_PIN -1 #define KILL_PIN -1
#define POWER_LOSS_PIN -1 // PWR_LOSS / nAC_FAULT #define POWER_LOSS_PIN -1 // PWR_LOSS / nAC_FAULT
// //
// LCD / Controller // LCD / Controller
// //
//#define SD_DETECT_PIN 66 // PA15 SD_CA //#define SD_DETECT_PIN PA15 // SD_CARD_DETECT
//#define BEEPER_PIN 24 // PC9 SDIO_D1 //#define BEEPER_PIN PC9 // SDIO_D1
//#define LCD_PINS_RS 65 // PE9 Y_DIR //#define LCD_PINS_RS PE9 // Y_DIR
//#define LCD_PINS_ENABLE 59 // PE8 E3_FAN //#define LCD_PINS_ENABLE PE8 // E3_FAN
//#define LCD_PINS_D4 10 // PB12 SPI_C //#define LCD_PINS_D4 PB12 // SPI2_CS
//#define LCD_PINS_D5 13 // PB13 SPI_S //#define LCD_PINS_D5 PB13 // SPI2_SCK
//#define LCD_PINS_D6 12 // PB14 SPI_M //#define LCD_PINS_D6 PB14 // SPI2_MISO
//#define LCD_PINS_D7 11 // PB15 SPI_M //#define LCD_PINS_D7 PB15 // SPI2_MOSI
//#define BTN_EN1 57 // PC4 E1_FAN //#define BTN_EN1 PC4 // E1_FAN
//#define BTN_EN2 58 // PC5 E2_FAN //#define BTN_EN2 PC5 // E2_FAN
//#define BTN_ENC 52 // PC3 BED_THE //#define BTN_ENC PC3 // BED_THERMISTOR_2
// //
// Extension pins // Extension pins
// //
//#define EXT0_PIN 49 // PB0 E2_HEAT //#define EXT0_PIN PB0 // E2_HEAT
//#define EXT1_PIN 50 // PB1 E3_HEAT //#define EXT1_PIN PB1 // E3_HEAT
//#define EXT2_PIN // PB2 not used (tied to ground //#define EXT2_PIN PB2 // not used (tied to ground)
//#define EXT3_PIN 39 // PD8 X_STOP //#define EXT3_PIN PD8 // X_STOP
//#define EXT4_PIN 40 // PD9 Y_STOP //#define EXT4_PIN PD9 // Y_STOP
//#define EXT5_PIN 41 // PD10 Z_STOP //#define EXT5_PIN PD10 // Z_STOP
//#define EXT6_PIN 42 // PD11 //#define EXT6_PIN PD11 // U_STOP
//#define EXT7_PIN 71 // PD12 E1_PW //#define EXT7_PIN PD12 // E1_PWM
//#define EXT8_PIN 64 // PB10 Y_PWM //#define EXT8_PIN PB10 // Y_PWM
// WIFI // WIFI
// 2 // PD3 CTS // PD3 CTS
// 3 // PD4 RTS // PD4 RTS
// 4 // PD5 TX // PD5 TX
// 5 // PD6 RX // PD6 RX
// 6 // PB5 WIFI_WAKEUP // PB5 WIFI_WAKEUP
// 7 // PE11 WIFI_RESET // PE11 WIFI_RESET
// 8 // PE12 WIFI_BOOT // PE12 WIFI_BOOT
// I2C USER // I2C USER
// 14 // PB7 SDA // PB7 SDA
// 15 // PB6 SCL // PB6 SCL
// JTAG // JTAG
// 20 // PA13 JTAG_TMS/SWDIO // PA13 JTAG_TMS/SWDIO
// 21 // PA14 JTAG_TCK/SWCLK // PA14 JTAG_TCK/SWCLK
// 22 // PB3 JTAG_TDO/SWO // PB3 JTAG_TDO/SWO
// //
// Onboard SD support // Onboard SD support
// //
#define SDIO_D0_PIN 23 // PC8 SDIO_D0
#define SDIO_D1_PIN 24 // PC9 SDIO_D1
//#define SD_CARD_DETECT_PIN 25 // PA15 SD_CARD_DETECT
#define SDIO_D2_PIN 26 // PC10 SDIO_D2
#define SDIO_D3_PIN 27 // PC11 SDIO_D3
#define SDIO_CK_PIN 28 // PC12 SDIO_CK
#define SDIO_CMD_PIN 29 // PD2 SDIO_CMD
#ifndef SDCARD_CONNECTION #ifndef SDCARD_CONNECTION
#define SDCARD_CONNECTION ONBOARD #define SDCARD_CONNECTION ONBOARD
#endif #endif
#if SD_CONNECTION_IS(ONBOARD) #if SD_CONNECTION_IS(ONBOARD)
#define SDIO_SUPPORT // Use SDIO for onboard SD
#ifndef SDIO_SUPPORT #define SDIO_SUPPORT // Use SDIO for onboard SD
#if DISABLED(SDIO_SUPPORT)
#define SOFTWARE_SPI // Use soft SPI for onboard SD #define SOFTWARE_SPI // Use soft SPI for onboard SD
#define SDSS SDIO_D3_PIN #define SDSS PC11
#define SD_SCK_PIN SDIO_CK_PIN #define SD_SCK_PIN PC12
#define SD_MISO_PIN SDIO_D0_PIN #define SD_MISO_PIN PC8
#define SD_MOSI_PIN SDIO_CMD_PIN #define SD_MOSI_PIN PD2
#endif #endif
//#define SD_DETECT_PIN PA15
#endif #endif
#ifndef SDSS #ifndef SDSS
#define SDSS 16 // PA4 SPI_CS #define SDSS PA4 // SPI1_CS
#endif #endif
// OTG // OTG
// 30 // PA11 OTG_DM // PA11 OTG_DM
// 31 // PA12 OTG_DP // PA12 OTG_DP
// USER_PINS // USER_PINS
// 34 // PD7 USER3 // PD7 USER3
// 35 // PB9 USER1 // PB9 USER1
// 36 // PE0 USER2 // PE0 USER2
// 37 // PB4 USER4 // PB4 USER4
// USERKET // USERKET
// 38 // PE7 USER_BUTTON // PE7 USER_BUTTON
// 0 // PA9 TX // PA9 TX
// 1 // PA10 RX // PA10 RX
// IR/PROBE // IR/PROBE
// 32 // PD1 IR_OUT // PD1 IR_OUT
// 33 // PC1 IR_ON // PC1 IR_ON
/** /**
* Logical pin vs. port/pin cross reference * Logical pin vs. port/pin cross reference
* *
* PA0 54 // E1_THERMISTOR PA9 0 // TX * PA0 E1_THERMISTOR PD0 W_STOP
* PA1 55 // E2_THERMISTOR PA10 1 // RX * PA1 E2_THERMISTOR PD1 IR_OUT
* PA2 56 // E3_THERMISTOR PD3 2 // CTS * PA2 E3_THERMISTOR PD2 SDIO_CMD
* PA3 53 // BED_THERMISTOR_3 PD4 3 // RTS * PA3 BED_THERMISTOR_3 PD3 CTS
* PA4 16 // SPI_CS PD5 4 // TX * PA4 SPI1_CS PD4 RTS
* PA5 17 // SPI_SCK PD6 5 // RX * PA5 SPI1_SCK PD5 TX
* PA6 18 // SPI_MISO PB5 6 // WIFI_WAKEUP * PA6 SPI1_MISO PD6 RX
* PA7 19 // SPI_MOSI PE11 7 // WIFI_RESET * PA7 SPI1_MOSI PD7 USER3
* PA8 43 // V_STOP PE12 8 // WIFI_BOOT * PA8 V_STOP PD8 X_STOP
* PA9 0 // TX PE1 9 // STATUS_LED * PA9 TX PD9 Y_STOP
* PA10 1 // RX PB12 10 // SPI_CS * PA10 RX PD10 Z_STOP
* PA11 30 // OTG_DM PB15 11 // SPI_MOSI * PA11 OTG_DM PD11 U_STOP
* PA12 31 // OTG_DP PB14 12 // SPI_MISO * PA12 OTG_DP PD12 E1_PWM
* PA13 20 // JTAG_TMS/SWDIO PB13 13 // SPI_SCK * PA13 JTAG_TMS/SWDIO PD13 BED_HEAT_2
* PA14 21 // JTAG_TCK/SWCLK PB7 14 // SDA * PA14 JTAG_TCK/SWCLK PD14 BED_HEAT_1
* PA15 25 // SD_CARD_DETECT PB6 15 // SCL * PA15 SD_CARD_DETECT PD15 BED_HEAT_3
* PB0 49 // E2_HEAT_PWM PA4 16 // SPI_CS *
* PB1 50 // E3_HEAT_PWM PA5 17 // SPI_SCK * PB0 E2_HEAT_PWM PE0 USER2
* PB3 22 // JTAG_TDO/SWO PA6 18 // SPI_MISO * PB1 E3_HEAT_PWM PE1 STATUS_LED
* PB4 37 // USER4 PA7 19 // SPI_MOSI * PB2 --- PE2 E3_DIR
* PB5 6 // WIFI_WAKEUP PA13 20 // JTAG_TMS/SWDIO * PB3 JTAG_TDO/SWO PE3 E3_RESET
* PB6 15 // SCL PA14 21 // JTAG_TCK/SWCLK * PB4 USER4 PE4 E2_RESET
* PB7 14 // SDA PB3 22 // JTAG_TDO/SWO * PB5 WIFI_WAKEUP PE5 E2_PWM
* PB8 77 // E3_PWM PC8 23 // SDIO_D0 * PB6 SCL PE6 E2_DIR
* PB9 35 // USER1 PC9 24 // SDIO_D1 * PB7 SDA PE7 USER_BUTTON
* PB10 64 // Y_PWM PA15 25 // SD_CARD_DETECT * PB8 E3_PWM PE8 E3_FAN
* PB12 10 // SPI_CS PC10 26 // SDIO_D2 * PB9 USER1 PE9 Y_DIR
* PB13 13 // SPI_SCK PC11 27 // SDIO_D3 * PB10 Y_PWM PE10 Y_RESET
* PB14 12 // SPI_MISO PC12 28 // SDIO_CK * PB11 --- PE11 WIFI_RESET
* PB15 11 // SPI_MOSI PD2 29 // SDIO_CMD * PB12 SPI2_CS PE12 WIFI_BOOT
* PC0 68 // Z_DIR PA11 30 // OTG_DM * PB13 SPI2_SCK PE13 X_RESET
* PC1 33 // IR_ON PA12 31 // OTG_DP * PB14 SPI2_MISO PE14 X_PWM
* PC2 51 // BED_THERMISTOR_1 PD1 32 // IR_OUT * PB15 SPI2_MOSI PE15 X_DIR
* PC3 52 // BED_THERMISTOR_2 PC1 33 // IR_ON *
* PC4 57 // E1_FAN PD7 34 // USER3 * PC0 Z_DIR
* PC5 58 // E2_FAN PB9 35 // USER1 * PC1 IR_ON
* PC6 67 // Z_PWM PE0 36 // USER2 * PC2 BED_THERMISTOR_1
* PC7 48 // E1_HEAT_PWM PB4 37 // USER4 * PC3 BED_THERMISTOR_2
* PC8 23 // SDIO_D0 PE7 38 // USER_BUTTON * PC4 E1_FAN
* PC9 24 // SDIO_D1 PD8 39 // X_STOP * PC5 E2_FAN
* PC10 26 // SDIO_D2 PD9 40 // Y_STOP * PC6 Z_PWM
* PC11 27 // SDIO_D3 PD10 41 // Z_STOP * PC7 E1_HEAT_PWM
* PC12 28 // SDIO_CK PD11 42 // U_STOP * PC8 SDIO_D0
* PC13 70 // E1_DIR PA8 43 // V_STOP * PC9 SDIO_D1
* PC14 69 // E1_RESET PD0 44 // W_STOP * PC10 SDIO_D2
* PC15 66 // Z_RESET PD13 45 // BED_HEAT_2 * PC11 SDIO_D3
* PD0 44 // W_STOP PD14 46 // BED_HEAT_1 * PC12 SDIO_CK
* PD1 32 // IR_OUT PD15 47 // BED_HEAT_3 * PC13 E1_DIR
* PD2 29 // SDIO_CMD PC7 48 // E1_HEAT_PWM * PC14 E1_RESET
* PD3 2 // CTS PB0 49 // E2_HEAT_PWM * PC15 Z_RESET
* PD4 3 // RTS PB1 50 // E3_HEAT_PWM
* PD5 4 // TX PC2 51 // BED_THERMISTOR_1
* PD6 5 // RX PC3 52 // BED_THERMISTOR_2
* PD7 34 // USER3 PA3 53 // BED_THERMISTOR_3
* PD8 39 // X_STOP PA0 54 // E1_THERMISTOR
* PD9 40 // Y_STOP PA1 55 // E2_THERMISTOR
* PD10 41 // Z_STOP PA2 56 // E3_THERMISTOR
* PD11 42 // U_STOP PC4 57 // E1_FAN
* PD12 71 // E1_PWM PC5 58 // E2_FAN
* PD13 45 // BED_HEAT_2 PE8 59 // E3_FAN
* PD14 46 // BED_HEAT_1 PE13 60 // X_RESET
* PD15 47 // BED_HEAT_3 PE14 61 // X_PWM
* PE0 36 // USER2 PE15 62 // X_DIR
* PE1 9 // STATUS_LED PE10 63 // Y_RESET
* PE2 76 // E3_DIR PB10 64 // Y_PWM
* PE3 75 // E3_RESET PE9 65 // Y_DIR
* PE4 72 // E2_RESET PC15 66 // Z_RESET
* PE5 73 // E2_PWM PC6 67 // Z_PWM
* PE6 74 // E2_DIR PC0 68 // Z_DIR
* PE7 38 // USER_BUTTON PC14 69 // E1_RESET
* PE8 59 // E3_FAN PC13 70 // E1_DIR
* PE9 65 // Y_DIR PD12 71 // E1_PWM
* PE10 63 // Y_RESET PE4 72 // E2_RESET
* PE11 7 // WIFI_RESET PE5 73 // E2_PWM
* PE12 8 // WIFI_BOOT PE6 74 // E2_DIR
* PE13 60 // X_RESET PE3 75 // E3_RESET
* PE14 61 // X_PWM PE2 76 // E3_DIR
* PE15 62 // X_DIR PB8 77 // E3_PWM
*/ */