bissen21/Marlin_Firmware
1
0
Fork 0
Code Issues Pull Requests Projects Releases 4 Wiki Activity

Several fixes to the backtracer. Tested ant it works

Browse Source
This commit is contained in:
etagle
2018-03-26 03:42:54 -03:00
parent 9a24c0ae3f
commit 328edea03a
5 changed files with 444 additions and 105 deletions
Download Patch File Download Diff File Expand all files Collapse all files

110
Marlin/src/HAL/HAL_DUE/DebugMonitor_Due.cpp
View File

@ -34,19 +34,6 @@
// Serial interrupt routines or any C runtime, as we don't know the
// state we are when running them
/* These symbols point to the start and end of stack */
extern "C" const int _sstack;
extern "C" const int _estack;
/* These symbols point to the start and end of the code section */
extern "C" const int _sfixed;
extern "C" const int _efixed;
/* These symbols point to the start and end of initialized data (could be SRAM functions!) */
extern "C" const int _srelocate;
extern "C" const int _erelocate;
// A SW memory barrier, to ensure GCC does not overoptimize loops
#define sw_barrier() asm volatile("": : :"memory");
@ -126,25 +113,20 @@ static void TXDec(uint32_t v) {
}
/* Validate address */
static bool validate_addr(uint16_t addr) {
static bool validate_addr(uint32_t addr) {
// PC must point into the text (CODE) area
if (addr >= (uint32_t)&_sfixed && addr <= (uint32_t)&_efixed)
// Address must be in SRAM (0x20070000 - 0x20088000)
if (addr >= 0x20070000 && addr < 0x20088000)
return true;
// Or into the SRAM function area
if (addr >= (uint32_t)&_srelocate && addr <= (uint32_t)&_erelocate)
return true;
// SP must point into the allocated stack area
if (addr >= (uint32_t)&_sstack && addr <= (uint32_t)&_estack)
// Or in FLASH (0x00080000 - 0x00100000)
if (addr >= 0x00080000 && addr < 0x00100000)
return true;
return false;
}
static bool UnwReadW(const uint32_t a, uint32_t *v) {
if (!validate_addr(a))
return false;
@ -153,7 +135,6 @@ static bool UnwReadW(const uint32_t a, uint32_t *v) {
}
static bool UnwReadH(const uint32_t a, uint16_t *v) {
if (!validate_addr(a))
return false;
@ -162,7 +143,6 @@ static bool UnwReadH(const uint32_t a, uint16_t *v) {
}
static bool UnwReadB(const uint32_t a, uint8_t *v) {
if (!validate_addr(a))
return false;
@ -173,13 +153,27 @@ static bool UnwReadB(const uint32_t a, uint8_t *v) {
// Dump a backtrace entry
static bool UnwReportOut(void* ctx, const UnwReport* bte) {
int* p = (int*)ctx;
TX(bte->name?bte->name:"unknown"); TX('@');TXHex(bte->function);
(*p)++;
TX('#'); TXDec(*p); TX(" : ");
TX(bte->name?bte->name:"unknown"); TX('@'); TXHex(bte->function);
TX('+'); TXDec(bte->address - bte->function);
TX(" PC:");TXHex(bte->address); TX('\n');
return true;
}
#if defined(UNW_DEBUG)
void UnwPrintf(const char* format, ...) {
char dest[256];
va_list argptr;
va_start(argptr, format);
vsprintf(dest, format, argptr);
va_end(argptr);
TX(&dest[0]);
}
#endif
/* Table of function pointers for passing to the unwinder */
static const UnwindCallbacks UnwCallbacks = {
UnwReportOut,
@ -187,7 +181,7 @@ static const UnwindCallbacks UnwCallbacks = {
UnwReadH,
UnwReadB
#if defined(UNW_DEBUG)
,printf
,UnwPrintf
#endif
};
@ -201,24 +195,27 @@ static const UnwindCallbacks UnwCallbacks = {
* The function ends with a BKPT instruction to force control back into the debugger
*/
extern "C"
void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
void HardFault_HandlerC(unsigned long *sp, unsigned long lr, unsigned long cause) {
static const char* causestr[] = {
"NMI","Hard","Mem","Bus","Usage","Debug","WDT","RSTC"
};
UnwindFrame btf;
// Dump report to the Programming port (interrupts are DISABLED)
TXBegin();
TX("\n\n## Software Fault detected ##\n");
TX("Cause: "); TX(causestr[cause]); TX('\n');
TX("R0 : "); TXHex(((unsigned long)hardfault_args[0])); TX('\n');
TX("R1 : "); TXHex(((unsigned long)hardfault_args[1])); TX('\n');
TX("R2 : "); TXHex(((unsigned long)hardfault_args[2])); TX('\n');
TX("R3 : "); TXHex(((unsigned long)hardfault_args[3])); TX('\n');
TX("R12 : "); TXHex(((unsigned long)hardfault_args[4])); TX('\n');
TX("LR : "); TXHex(((unsigned long)hardfault_args[5])); TX('\n');
TX("PC : "); TXHex(((unsigned long)hardfault_args[6])); TX('\n');
TX("PSR : "); TXHex(((unsigned long)hardfault_args[7])); TX('\n');
TX("R0 : "); TXHex(((unsigned long)sp[0])); TX('\n');
TX("R1 : "); TXHex(((unsigned long)sp[1])); TX('\n');
TX("R2 : "); TXHex(((unsigned long)sp[2])); TX('\n');
TX("R3 : "); TXHex(((unsigned long)sp[3])); TX('\n');
TX("R12 : "); TXHex(((unsigned long)sp[4])); TX('\n');
TX("LR : "); TXHex(((unsigned long)sp[5])); TX('\n');
TX("PC : "); TXHex(((unsigned long)sp[6])); TX('\n');
TX("PSR : "); TXHex(((unsigned long)sp[7])); TX('\n');
// Configurable Fault Status Register
// Consists of MMSR, BFSR and UFSR
@ -241,14 +238,18 @@ void HardFault_HandlerC(unsigned long *hardfault_args, unsigned long cause) {
// Bus Fault Address Register
TX("BFAR : "); TXHex((*((volatile unsigned long *)(0xE000ED38)))); TX('\n');
TX("ExcLR: "); TXHex(lr); TX('\n');
TX("ExcSP: "); TXHex((unsigned long)sp); TX('\n');
btf.sp = ((unsigned long)sp) + 8*4; // The original stack pointer
btf.fp = btf.sp;
btf.lr = ((unsigned long)sp[5]);
btf.pc = ((unsigned long)sp[6]) | 1; // Force Thumb, as CORTEX only support it
// Perform a backtrace
TX("\nBacktrace:\n\n");
UnwindFrame btf;
btf.sp = ((unsigned long)hardfault_args[7]);
btf.fp = btf.sp;
btf.lr = ((unsigned long)hardfault_args[5]);
btf.pc = ((unsigned long)hardfault_args[6]);
UnwindStart(&btf, &UnwCallbacks, nullptr);
int ctr = 0;
UnwindStart(&btf, &UnwCallbacks, &ctr);
// Disable all NVIC interrupts
NVIC->ICER[0] = 0xFFFFFFFF;
@ -274,7 +275,8 @@ __attribute__((naked)) void NMI_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#0 \n"
" mov r1,lr \n"
" mov r2,#0 \n"
" b HardFault_HandlerC \n"
);
}
@ -285,7 +287,8 @@ __attribute__((naked)) void HardFault_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#1 \n"
" mov r1,lr \n"
" mov r2,#1 \n"
" b HardFault_HandlerC \n"
);
}
@ -296,7 +299,8 @@ __attribute__((naked)) void MemManage_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#2 \n"
" mov r1,lr \n"
" mov r2,#2 \n"
" b HardFault_HandlerC \n"
);
}
@ -307,7 +311,8 @@ __attribute__((naked)) void BusFault_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#3 \n"
" mov r1,lr \n"
" mov r2,#3 \n"
" b HardFault_HandlerC \n"
);
}
@ -318,7 +323,8 @@ __attribute__((naked)) void UsageFault_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#4 \n"
" mov r1,lr \n"
" mov r2,#4 \n"
" b HardFault_HandlerC \n"
);
}
@ -329,18 +335,21 @@ __attribute__((naked)) void DebugMon_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#5 \n"
" mov r1,lr \n"
" mov r2,#5 \n"
" b HardFault_HandlerC \n"
);
}
/* This is NOT an exception, it is an interrupt handler - Nevertheless, the framing is the same */
__attribute__((naked)) void WDT_Handler(void) {
__asm volatile (
" tst lr, #4 \n"
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#6 \n"
" mov r1,lr \n"
" mov r2,#6 \n"
" b HardFault_HandlerC \n"
);
}
@ -351,7 +360,8 @@ __attribute__((naked)) void RSTC_Handler(void) {
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" mov r1,#7 \n"
" mov r1,lr \n"
" mov r2,#7 \n"
" b HardFault_HandlerC \n"
);
}