Support for TFT & Touch Screens (#18130)
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								buildroot/share/PlatformIO/scripts/mks_encrypt.py
									
									
									
									
									
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								buildroot/share/PlatformIO/scripts/mks_encrypt.py
									
									
									
									
									
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							| @@ -0,0 +1,32 @@ | ||||
| import os,sys | ||||
| Import("env") | ||||
|  | ||||
| from SCons.Script import DefaultEnvironment | ||||
| board = DefaultEnvironment().BoardConfig() | ||||
|  | ||||
| # Encrypt ${PROGNAME}.bin and save it as build.firmware ('Robin.bin') | ||||
| def encrypt(source, target, env): | ||||
|   key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] | ||||
|  | ||||
|   firmware = open(target[0].path, "rb") | ||||
|   robin = open(target[0].dir.path +'/'+ board.get("build.firmware"), "wb") | ||||
|   length = os.path.getsize(target[0].path) | ||||
|   position = 0 | ||||
|   try: | ||||
|     while position < length: | ||||
|       byte = firmware.read(1) | ||||
|       if position >= 320 and position < 31040: | ||||
|         byte = chr(ord(byte) ^ key[position & 31]) | ||||
|         if sys.version_info[0] > 2: | ||||
|           byte = bytes(byte, 'latin1') | ||||
|       robin.write(byte) | ||||
|       position += 1 | ||||
|   finally: | ||||
|     firmware.close() | ||||
|     robin.close() | ||||
|  | ||||
| if 'firmware' in board.get("build").keys(): | ||||
|   env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt); | ||||
| else: | ||||
|   print("You need to define output file via board_build.firmware = 'filename' parameter", file=sys.stderr) | ||||
|   exit(1); | ||||
| @@ -123,7 +123,7 @@ static void setup_clocks(void) { | ||||
| #if !USE_HSI_CLOCK | ||||
|     // Enable HSE, and wait until it's ready. | ||||
|     rcc_turn_on_clk(RCC_CLK_HSE); | ||||
|     while (!rcc_is_clk_ready(RCC_CLK_HSE)) | ||||
|     while(!rcc_is_clk_ready(RCC_CLK_HSE)) | ||||
|         ; | ||||
| #endif | ||||
|     // Configure AHBx, APBx, etc. prescalers and the main PLL. | ||||
|   | ||||
| @@ -0,0 +1,425 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2020, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  * Automatically generated from STM32F103V(F-G)Tx.xml | ||||
|  */ | ||||
| #include "Arduino.h" | ||||
| #include "PeripheralPins.h" | ||||
|  | ||||
| /* ===== | ||||
|  * Note: Commented lines are alternative possibilities which are not used per default. | ||||
|  *       If you change them, you will have to know what you do | ||||
|  * ===== | ||||
|  */ | ||||
|  | ||||
| //*** ADC *** | ||||
|  | ||||
| #ifdef HAL_ADC_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_ADC[] = { | ||||
|   {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 | ||||
|   // {PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 | ||||
| #endif | ||||
|   {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 | ||||
|   // {PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 | ||||
| #endif | ||||
|   {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 | ||||
|   // {PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 | ||||
| #endif | ||||
|   {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 | ||||
|   // {PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 | ||||
| #endif | ||||
|   {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 | ||||
|   // {PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 | ||||
|   {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 | ||||
|   // {PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 | ||||
|   {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 | ||||
|   // {PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 | ||||
|   {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 | ||||
|   // {PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 | ||||
|   {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 | ||||
|   // {PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 | ||||
|   {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 | ||||
|   // {PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 | ||||
|   {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 | ||||
|   // {PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 | ||||
| #endif | ||||
|   {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 | ||||
|   // {PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 | ||||
| #endif | ||||
|   {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 | ||||
|   // {PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 | ||||
| #endif | ||||
|   {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 | ||||
|   // {PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 | ||||
| #endif | ||||
|   {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 | ||||
|   // {PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 | ||||
|   {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 | ||||
|   // {PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** DAC *** | ||||
|  | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
| #ifdef HAL_DAC_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_DAC[] = { | ||||
|   {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 | ||||
|   {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
| #endif | ||||
|  | ||||
| //*** I2C *** | ||||
|  | ||||
| #ifdef HAL_I2C_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_I2C_SDA[] = { | ||||
|   {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | ||||
|   {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_I2C_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_I2C_SCL[] = { | ||||
|   {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | ||||
|   {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** PWM *** | ||||
|  | ||||
| #ifdef HAL_TIM_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_PWM[] = { | ||||
|   {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 | ||||
|   // {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1 | ||||
| #endif | ||||
|   {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2 | ||||
|   // {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2 | ||||
| #endif | ||||
|   {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3 | ||||
|   // {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3 | ||||
| #endif | ||||
| #ifdef STM32F103xG | ||||
|   // {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1 | ||||
| #endif | ||||
|   // {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 | ||||
|   {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4 | ||||
| #else | ||||
|   {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 | ||||
| #endif | ||||
| #if defined(STM32F103xG) | ||||
|   // {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 | ||||
| #endif | ||||
|   {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 | ||||
| #if defined(STM32F103xG) | ||||
|   // {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 | ||||
| #endif | ||||
|   {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N | ||||
|   // {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 | ||||
|   // {PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N | ||||
| #if defined(STM32F103xG) | ||||
|   // {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 | ||||
| #endif | ||||
|   {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 | ||||
|   // {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 | ||||
|   {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2 | ||||
|   // {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 | ||||
|   {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3 | ||||
|   // {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 | ||||
|   {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4 | ||||
|   // {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 | ||||
|   {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 | ||||
|   // {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 | ||||
|   // {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N | ||||
|   {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3 | ||||
|   // {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N | ||||
| #endif | ||||
|   {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N | ||||
|   // {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4 | ||||
|   // {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N | ||||
| #endif | ||||
|   {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 | ||||
|   // {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 | ||||
|   {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 | ||||
|   {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 | ||||
|   {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1 | ||||
|   {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2 | ||||
|   {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 | ||||
| #if defined(STM32F103xG) | ||||
|   // {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 | ||||
| #endif | ||||
|   {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 | ||||
| #if defined(STM32F103xG) | ||||
|   // {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 | ||||
| #endif | ||||
|   {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 | ||||
|   // {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 | ||||
|   {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 | ||||
|   // {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 | ||||
|   {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N | ||||
|   {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N | ||||
| #if defined(STM32F103xG) | ||||
|   // {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 | ||||
| #endif | ||||
|   {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N | ||||
| #if defined(STM32F103xG) | ||||
|   // {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 | ||||
| #endif | ||||
|   {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1 | ||||
| #endif | ||||
|   {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2 | ||||
| #endif | ||||
|   {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3 | ||||
|   // {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3 | ||||
|   {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4 | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4 | ||||
| #endif | ||||
|   {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1 | ||||
|   {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2 | ||||
|   {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3 | ||||
|   {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4 | ||||
| #if defined(STM32F103xG) | ||||
|   {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1 | ||||
|   {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2 | ||||
| #endif | ||||
|   {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N | ||||
|   {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1 | ||||
|   {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N | ||||
|   {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2 | ||||
|   {PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N | ||||
|   {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3 | ||||
|   {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4 | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** SERIAL *** | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_TX[] = { | ||||
|   {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | ||||
|   {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
| #endif | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #endif | ||||
|   {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_RX[] = { | ||||
|   {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_10, USART1,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | ||||
|   {PB_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PC_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PC_11, UART4,   STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PC_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
| #endif | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #endif | ||||
|   {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_RTS[] = { | ||||
|   {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_CTS[] = { | ||||
|   {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** SPI *** | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_MOSI[] = { | ||||
|   {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
| #endif | ||||
|   {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_MISO[] = { | ||||
|   {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
| #endif | ||||
|   {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_SCLK[] = { | ||||
|   {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
| #endif | ||||
|   {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_SSEL[] = { | ||||
|   {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
|   // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
| #else | ||||
|   {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
| #endif | ||||
|   {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** CAN *** | ||||
|  | ||||
| #ifdef HAL_CAN_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_CAN_RD[] = { | ||||
|   {PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_8,  CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, | ||||
|   {PD_0,  CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_CAN_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_CAN_TD[] = { | ||||
|   {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_9,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, | ||||
|   {PD_1,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** No ETHERNET *** | ||||
|  | ||||
| //*** No QUADSPI *** | ||||
|  | ||||
| //*** USB *** | ||||
|  | ||||
| #ifdef HAL_PCD_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_USB[] = { | ||||
|   {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM | ||||
|   {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** No USB_OTG_FS *** | ||||
|  | ||||
| //*** No USB_OTG_HS *** | ||||
|  | ||||
| //*** SD *** | ||||
|  | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
| #ifdef HAL_SD_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SD[] = { | ||||
|   {PB_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4 | ||||
|   {PB_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5 | ||||
|   {PC_6,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6 | ||||
|   {PC_7,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7 | ||||
|   {PC_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0 | ||||
|   {PC_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1 | ||||
|   {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2 | ||||
|   {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3 | ||||
|   {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK | ||||
|   {PD_2,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
| #endif | ||||
| @@ -0,0 +1,30 @@ | ||||
| /* SYS_WKUP */ | ||||
| #ifdef PWR_WAKEUP_PIN1 | ||||
|   SYS_WKUP1 = PA_0, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN2 | ||||
|   SYS_WKUP2 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN3 | ||||
|   SYS_WKUP3 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN4 | ||||
|   SYS_WKUP4 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN5 | ||||
|   SYS_WKUP5 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN6 | ||||
|   SYS_WKUP6 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN7 | ||||
|   SYS_WKUP7 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN8 | ||||
|   SYS_WKUP8 = NC, | ||||
| #endif | ||||
| /* USB */ | ||||
| #ifdef USBCON | ||||
|   USB_DM = PA_11, | ||||
|   USB_DP = PA_12, | ||||
| #endif | ||||
							
								
								
									
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								buildroot/share/PlatformIO/variants/MARLIN_F103Vx/ldscript.ld
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
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								buildroot/share/PlatformIO/variants/MARLIN_F103Vx/ldscript.ld
									
									
									
									
									
										Normal file
									
								
							| @@ -0,0 +1,200 @@ | ||||
| /* | ||||
| ****************************************************************************** | ||||
| ** | ||||
|  | ||||
| **  File        : LinkerScript.ld | ||||
| ** | ||||
| **  Author		: Auto-generated by STM32CubeIDE | ||||
| ** | ||||
| **  Abstract    : Linker script for STM32F103V(8/B/C/E/F/GTx Device from STM32F1 series | ||||
| **                      64/128/256/512/768/1024Kbytes FLASH | ||||
| **                      20/20/48/64/64/96/96Kbytes RAM | ||||
| ** | ||||
| **                Set heap size, stack size and stack location according | ||||
| **                to application requirements. | ||||
| ** | ||||
| **                Set memory bank area and size if external memory is used. | ||||
| ** | ||||
| **  Target      : STMicroelectronics STM32 | ||||
| ** | ||||
| **  Distribution: The file is distributed as is without any warranty | ||||
| **                of any kind. | ||||
| ** | ||||
| ***************************************************************************** | ||||
| ** @attention | ||||
| ** | ||||
| ** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> | ||||
| ** | ||||
| ** Redistribution and use in source and binary forms, with or without modification, | ||||
| ** are permitted provided that the following conditions are met: | ||||
| **   1. Redistributions of source code must retain the above copyright notice, | ||||
| **      this list of conditions and the following disclaimer. | ||||
| **   2. Redistributions in binary form must reproduce the above copyright notice, | ||||
| **      this list of conditions and the following disclaimer in the documentation | ||||
| **      and/or other materials provided with the distribution. | ||||
| **   3. Neither the name of STMicroelectronics nor the names of its contributors | ||||
| **      may be used to endorse or promote products derived from this software | ||||
| **      without specific prior written permission. | ||||
| ** | ||||
| ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||||
| ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||||
| ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||||
| ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | ||||
| ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||||
| ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | ||||
| ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||||
| ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | ||||
| ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||||
| ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||||
| ** | ||||
| ***************************************************************************** | ||||
| */ | ||||
|  | ||||
| /* Entry Point */ | ||||
| ENTRY(Reset_Handler) | ||||
|  | ||||
| /* Highest address of the user mode stack */ | ||||
| _estack = 0x20000000 + LD_MAX_DATA_SIZE;	/* end of "RAM" Ram type memory */ | ||||
| _Min_Heap_Size = 0x200;      /* required amount of heap  */ | ||||
| _Min_Stack_Size = 0x400; /* required amount of stack */ | ||||
|  | ||||
| /* Memories definition */ | ||||
| MEMORY | ||||
| { | ||||
|     RAM	(xrw)	: ORIGIN = 0x20000000,	LENGTH = LD_MAX_DATA_SIZE | ||||
|     FLASH	(rx)	: ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET | ||||
| } | ||||
|  | ||||
| /* Sections */ | ||||
| SECTIONS | ||||
| { | ||||
|   /* The startup code into "FLASH" Rom type memory */ | ||||
|   .isr_vector : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     KEEP(*(.isr_vector)) /* Startup code */ | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   /* The program code and other data into "FLASH" Rom type memory */ | ||||
|   .text : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     *(.text)           /* .text sections (code) */ | ||||
|     *(.text*)          /* .text* sections (code) */ | ||||
|     *(.glue_7)         /* glue arm to thumb code */ | ||||
|     *(.glue_7t)        /* glue thumb to arm code */ | ||||
|     *(.eh_frame) | ||||
|  | ||||
|     KEEP (*(.init)) | ||||
|     KEEP (*(.fini)) | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _etext = .;        /* define a global symbols at end of code */ | ||||
|   } >FLASH | ||||
|  | ||||
|   /* Constant data into "FLASH" Rom type memory */ | ||||
|   .rodata : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     *(.rodata)         /* .rodata sections (constants, strings, etc.) */ | ||||
|     *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */ | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   .ARM.extab   : { | ||||
|   	. = ALIGN(4); | ||||
|   	*(.ARM.extab* .gnu.linkonce.armextab.*) | ||||
|   	. = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .ARM : { | ||||
|     . = ALIGN(4); | ||||
|     __exidx_start = .; | ||||
|     *(.ARM.exidx*) | ||||
|     __exidx_end = .; | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   .preinit_array     : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__preinit_array_start = .); | ||||
|     KEEP (*(.preinit_array*)) | ||||
|     PROVIDE_HIDDEN (__preinit_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .init_array : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__init_array_start = .); | ||||
|     KEEP (*(SORT(.init_array.*))) | ||||
|     KEEP (*(.init_array*)) | ||||
|     PROVIDE_HIDDEN (__init_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .fini_array : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__fini_array_start = .); | ||||
|     KEEP (*(SORT(.fini_array.*))) | ||||
|     KEEP (*(.fini_array*)) | ||||
|     PROVIDE_HIDDEN (__fini_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   /* Used by the startup to initialize data */ | ||||
|   _sidata = LOADADDR(.data); | ||||
|  | ||||
|   /* Initialized data sections into "RAM" Ram type memory */ | ||||
|   .data : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     _sdata = .;        /* create a global symbol at data start */ | ||||
|     *(.data)           /* .data sections */ | ||||
|     *(.data*)          /* .data* sections */ | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _edata = .;        /* define a global symbol at data end */ | ||||
|   } >RAM AT> FLASH | ||||
|  | ||||
|  | ||||
|   /* Uninitialized data section into "RAM" Ram type memory */ | ||||
|   . = ALIGN(4); | ||||
|   .bss : | ||||
|   { | ||||
|     /* This is used by the startup in order to initialize the .bss secion */ | ||||
|     _sbss = .;         /* define a global symbol at bss start */ | ||||
|     __bss_start__ = _sbss; | ||||
|     *(.bss) | ||||
|     *(.bss*) | ||||
|     *(COMMON) | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _ebss = .;         /* define a global symbol at bss end */ | ||||
|     __bss_end__ = _ebss; | ||||
|   } >RAM | ||||
|  | ||||
|   /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */ | ||||
|   ._user_heap_stack : | ||||
|   { | ||||
|     . = ALIGN(8); | ||||
|     PROVIDE ( end = . ); | ||||
|     PROVIDE ( _end = . ); | ||||
|     . = . + _Min_Heap_Size; | ||||
|     . = . + _Min_Stack_Size; | ||||
|     . = ALIGN(8); | ||||
|   } >RAM | ||||
|  | ||||
|  | ||||
|  | ||||
|   /* Remove information from the compiler libraries */ | ||||
|   /DISCARD/ : | ||||
|   { | ||||
|     libc.a ( * ) | ||||
|     libm.a ( * ) | ||||
|     libgcc.a ( * ) | ||||
|   } | ||||
|  | ||||
|   .ARM.attributes 0 : { *(.ARM.attributes) } | ||||
| } | ||||
|  | ||||
							
								
								
									
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								buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.cpp
									
									
									
									
									
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							| @@ -0,0 +1,235 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2019, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  */ | ||||
|  | ||||
| #include "pins_arduino.h" | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif | ||||
|  | ||||
| // Digital PinName array | ||||
| const PinName digitalPin[] = { | ||||
|   PA_0,  //D0 | ||||
|   PA_1,  //D1 | ||||
|   PA_2,  //D2 | ||||
|   PA_3,  //D3 | ||||
|   PA_4,  //D4 | ||||
|   PA_5,  //D5 | ||||
|   PA_6,  //D6 | ||||
|   PA_7,  //D7 | ||||
|   PA_8,  //D8 | ||||
|   PA_9,  //D9 | ||||
|   PA_10, //D10 | ||||
|   PA_11, //D11 | ||||
|   PA_12, //D12 | ||||
|   PA_13, //D13 | ||||
|   PA_14, //D14 | ||||
|   PA_15, //D15 | ||||
|  | ||||
|   PB_0,  //D16 | ||||
|   PB_1,  //D17 | ||||
|   PB_2,  //D18 | ||||
|   PB_3,  //D19 | ||||
|   PB_4,  //D20 | ||||
|   PB_5,  //D21 | ||||
|   PB_6,  //D22 | ||||
|   PB_7,  //D23 | ||||
|   PB_8,  //D24 | ||||
|   PB_9,  //D25 | ||||
|   PB_10, //D26 | ||||
|   PB_11, //D27 | ||||
|   PB_12, //D28 | ||||
|   PB_13, //D29 | ||||
|   PB_14, //D30 | ||||
|   PB_15, //D31 | ||||
|  | ||||
|   PC_0,  //D32 | ||||
|   PC_1,  //D33 | ||||
|   PC_2,  //D34 | ||||
|   PC_3,  //D35 | ||||
|   PC_4,  //D36 | ||||
|   PC_5,  //D37 | ||||
|   PC_6,  //D38 | ||||
|   PC_7,  //D39 | ||||
|   PC_8,  //D40 | ||||
|   PC_9,  //D41 | ||||
|   PC_10, //D42 | ||||
|   PC_11, //D43 | ||||
|   PC_12, //D44 | ||||
|   PC_13, //D45 | ||||
|   PC_14, //D46 | ||||
|   PC_15, //D47 | ||||
|  | ||||
|   PD_0,  //D48 | ||||
|   PD_1,  //D49 | ||||
|   PD_2,  //D50 | ||||
|   PD_3,  //D51 | ||||
|   PD_4,  //D52 | ||||
|   PD_5,  //D53 | ||||
|   PD_6,  //D54 | ||||
|   PD_7,  //D55 | ||||
|   PD_8,  //D56 | ||||
|   PD_9,  //D57 | ||||
|   PD_10, //D58 | ||||
|   PD_11, //D59 | ||||
|   PD_12, //D60 | ||||
|   PD_13, //D61 | ||||
|   PD_14, //D62 | ||||
|   PD_15, //D63 | ||||
|  | ||||
|   PE_0,  //D64 | ||||
|   PE_1,  //D65 | ||||
|   PE_2,  //D66 | ||||
|   PE_3,  //D67 | ||||
|   PE_4,  //D68 | ||||
|   PE_5,  //D69 | ||||
|   PE_6,  //D70 | ||||
|   PE_7,  //D71 | ||||
|   PE_8,  //D72 | ||||
|   PE_9,  //D73 | ||||
|   PE_10, //D74 | ||||
|   PE_11, //D75 | ||||
|   PE_12, //D76 | ||||
|   PE_13, //D77 | ||||
|   PE_14, //D78 | ||||
|   PE_15, //D79 | ||||
| }; | ||||
|  | ||||
| // Analog (Ax) pin number array | ||||
| const uint32_t analogInputPin[] = { | ||||
|   0,  // A0,  PA0 | ||||
|   1,  // A1,  PA1 | ||||
|   2,  // A2,  PA2 | ||||
|   3,  // A3,  PA3 | ||||
|   4,  // A4,  PA4 | ||||
|   5,  // A5,  PA5 | ||||
|   6,  // A6,  PA6 | ||||
|   7,  // A7,  PA7 | ||||
|   16, // A8,  PB0 | ||||
|   17, // A9,  PB1 | ||||
|   32, // A10, PC0 | ||||
|   33, // A11, PC1 | ||||
|   34, // A12, PC2 | ||||
|   35, // A13, PC3 | ||||
|   36, // A14, PC4 | ||||
|   37, // A15, PC5 | ||||
| }; | ||||
|  | ||||
| /******************************************************************************/ | ||||
| /*            PLL (clocked by HSE) used as System clock source                */ | ||||
| /******************************************************************************/ | ||||
| static bool SetSysClock_PLL_HSE(bool bypass) | ||||
| { | ||||
|   RCC_OscInitTypeDef RCC_OscInitStruct = {}; | ||||
|   RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; | ||||
|   RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; | ||||
|   bool ret = false; | ||||
|  | ||||
|   /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|   RCC_OscInitStruct.OscillatorType   = RCC_OSCILLATORTYPE_HSE; | ||||
|   if (bypass == false) { | ||||
|     RCC_OscInitStruct.HSEState       = RCC_HSE_ON; | ||||
|   } else { | ||||
|     RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS; | ||||
|   } | ||||
|   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; | ||||
|   RCC_OscInitStruct.HSIState       = RCC_HSI_ON; | ||||
|   RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON; | ||||
|   RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE; | ||||
|   RCC_OscInitStruct.PLL.PLLMUL     = RCC_PLL_MUL9; | ||||
|   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { | ||||
|     /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|     RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | ||||
|                                   | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; | ||||
|     RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; | ||||
|     RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1; | ||||
|     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; | ||||
|     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | ||||
|  | ||||
|     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) == HAL_OK) { | ||||
|       PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; | ||||
|       PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; | ||||
|       PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; | ||||
|       if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { | ||||
|         ret = true; | ||||
|       } | ||||
|     } | ||||
|   } | ||||
|   return ret; | ||||
| } | ||||
|  | ||||
| /******************************************************************************/ | ||||
| /*            PLL (clocked by HSI) used as System clock source                */ | ||||
| /******************************************************************************/ | ||||
| bool SetSysClock_PLL_HSI(void) | ||||
| { | ||||
|   RCC_OscInitTypeDef RCC_OscInitStruct = {}; | ||||
|   RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; | ||||
|   RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; | ||||
|   bool ret = false; | ||||
|  | ||||
|   /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; | ||||
|   RCC_OscInitStruct.HSIState            = RCC_HSI_ON; | ||||
|   RCC_OscInitStruct.HSEState            = RCC_HSE_OFF; | ||||
|   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; | ||||
|   RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON; | ||||
|   RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSI_DIV2; | ||||
|   RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLL_MUL12; | ||||
|   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { | ||||
|     /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|     RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | ||||
|                                   | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; | ||||
|     RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; | ||||
|     RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1; | ||||
|     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; | ||||
|     RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | ||||
|  | ||||
|     if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) { | ||||
|       PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; | ||||
|       PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4; | ||||
|       PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; | ||||
|       if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { | ||||
|         ret = true; | ||||
|       } | ||||
|     } | ||||
|   } | ||||
|   return ret; | ||||
| } | ||||
|  | ||||
| WEAK void SystemClock_Config(void) | ||||
| { | ||||
|   /* | ||||
|    * If HSE_VALUE is not 8MHz and you want use it, then: | ||||
|    * - Redefine HSE_VALUE to the correct HSE_VALUE | ||||
|    * - Redefine SystemClock_Config() with the correct settings | ||||
|    */ | ||||
| #if HSE_VALUE == 8000000U | ||||
|   /* 1- Try to start with HSE and external 8MHz xtal */ | ||||
|   if (SetSysClock_PLL_HSE(false) == false) { | ||||
|     /* 2- If fail try to start with HSE and external clock */ | ||||
|     if (SetSysClock_PLL_HSE(true) == false) { | ||||
| #endif | ||||
|       /* 3- If fail start with HSI clock */ | ||||
|       if (SetSysClock_PLL_HSI() == false) { | ||||
|         Error_Handler(); | ||||
|       } | ||||
| #if HSE_VALUE == 8000000U | ||||
|     } | ||||
|   } | ||||
| #endif | ||||
| } | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } | ||||
| #endif | ||||
							
								
								
									
										181
									
								
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										181
									
								
								buildroot/share/PlatformIO/variants/MARLIN_F103Vx/variant.h
									
									
									
									
									
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							| @@ -0,0 +1,181 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2019, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  */ | ||||
|  | ||||
| #ifndef _VARIANT_ARDUINO_STM32_ | ||||
| #define _VARIANT_ARDUINO_STM32_ | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif // __cplusplus | ||||
|  | ||||
| /*---------------------------------------------------------------------------- | ||||
|  *        Pins | ||||
|  *----------------------------------------------------------------------------*/ | ||||
| #define PA0  0 | ||||
| #define PA1  1 | ||||
| #define PA2  2 | ||||
| #define PA3  3 | ||||
| #define PA4  4 | ||||
| #define PA5  5 | ||||
| #define PA6  6 | ||||
| #define PA7  7 | ||||
| #define PA8  8 | ||||
| #define PA9  9 | ||||
| #define PA10 10 | ||||
| #define PA11 11 | ||||
| #define PA12 12 | ||||
| #define PA13 13 | ||||
| #define PA14 14 | ||||
| #define PA15 15 | ||||
|  | ||||
| #define PB0  16 | ||||
| #define PB1  17 | ||||
| #define PB2  18 | ||||
| #define PB3  19 | ||||
| #define PB4  20 | ||||
| #define PB5  21 | ||||
| #define PB6  22 | ||||
| #define PB7  23 | ||||
| #define PB8  24 | ||||
| #define PB9  25 | ||||
| #define PB10 26 | ||||
| #define PB11 27 | ||||
| #define PB12 28 | ||||
| #define PB13 29 | ||||
| #define PB14 30 | ||||
| #define PB15 31 | ||||
|  | ||||
| #define PC0  32 | ||||
| #define PC1  33 | ||||
| #define PC2  34 | ||||
| #define PC3  35 | ||||
| #define PC4  36 | ||||
| #define PC5  37 | ||||
| #define PC6  38 | ||||
| #define PC7  39 | ||||
| #define PC8  40 | ||||
| #define PC9  41 | ||||
| #define PC10 42 | ||||
| #define PC11 43 | ||||
| #define PC12 44 | ||||
| #define PC13 45 | ||||
| #define PC14 46 | ||||
| #define PC15 47 | ||||
|  | ||||
| #define PD0  48 | ||||
| #define PD1  49 | ||||
| #define PD2  50 | ||||
| #define PD3  51 | ||||
| #define PD4  52 | ||||
| #define PD5  53 | ||||
| #define PD6  54 | ||||
| #define PD7  55 | ||||
| #define PD8  56 | ||||
| #define PD9  57 | ||||
| #define PD10 58 | ||||
| #define PD11 59 | ||||
| #define PD12 60 | ||||
| #define PD13 61 | ||||
| #define PD14 62 | ||||
| #define PD15 63 | ||||
|  | ||||
| #define PE0  64 | ||||
| #define PE1  65 | ||||
| #define PE2  66 | ||||
| #define PE3  67 | ||||
| #define PE4  68 | ||||
| #define PE5  69 | ||||
| #define PE6  70 | ||||
| #define PE7  71 | ||||
| #define PE8  72 | ||||
| #define PE9  73 | ||||
| #define PE10 74 | ||||
| #define PE11 75 | ||||
| #define PE12 76 | ||||
| #define PE13 77 | ||||
| #define PE14 78 | ||||
| #define PE15 79 | ||||
|  | ||||
| // This must be a literal | ||||
| #define NUM_DIGITAL_PINS        80 | ||||
| #define NUM_ANALOG_INPUTS       16 | ||||
|  | ||||
| // On-board LED pin number | ||||
| #ifndef LED_BUILTIN | ||||
| #define LED_BUILTIN             PB11 | ||||
| #endif | ||||
|  | ||||
| // On-board user button | ||||
| #ifndef USER_BTN | ||||
| #define USER_BTN                PC13 | ||||
| #endif | ||||
|  | ||||
| // SPI Definitions | ||||
| #define PIN_SPI_SS              PC4 | ||||
| #define PIN_SPI_MOSI            PA7 | ||||
| #define PIN_SPI_MISO            PA6 | ||||
| #define PIN_SPI_SCK             PA5 | ||||
|  | ||||
| // I2C Definitions | ||||
| #define PIN_WIRE_SDA            PB7 | ||||
| #define PIN_WIRE_SCL            PB6 | ||||
|  | ||||
| // Timer Definitions (optional) | ||||
| // Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin | ||||
| #define TIMER_TONE              TIM3 | ||||
| #define TIMER_SERVO             TIM2 | ||||
|  | ||||
| // UART Definitions | ||||
| // Define here Serial instance number to map on Serial generic name | ||||
| #define SERIAL_UART_INSTANCE    1 | ||||
|  | ||||
| // Extra HAL modules | ||||
| #if defined(STM32F103xE) || defined(STM32F103xG) | ||||
| #define HAL_DAC_MODULE_ENABLED | ||||
| #define HAL_SD_MODULE_ENABLED | ||||
| #define HAL_SRAM_MODULE_ENABLED | ||||
| #endif | ||||
|  | ||||
| // Default pin used for 'Serial' instance (ex: ST-Link) | ||||
| // Mandatory for Firmata | ||||
| #define PIN_SERIAL_RX           PA10 | ||||
| #define PIN_SERIAL_TX           PA9 | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } // extern "C" | ||||
| #endif | ||||
| /*---------------------------------------------------------------------------- | ||||
|  *        Arduino objects - C++ only | ||||
|  *----------------------------------------------------------------------------*/ | ||||
|  | ||||
| #ifdef __cplusplus | ||||
|   // These serial port names are intended to allow libraries and architecture-neutral | ||||
|   // sketches to automatically default to the correct port name for a particular type | ||||
|   // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, | ||||
|   // the first hardware serial port whose RX/TX pins are not dedicated to another use. | ||||
|   // | ||||
|   // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor | ||||
|   // | ||||
|   // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial | ||||
|   // | ||||
|   // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library | ||||
|   // | ||||
|   // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins. | ||||
|   // | ||||
|   // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX | ||||
|   //                            pins are NOT connected to anything by default. | ||||
|   #define SERIAL_PORT_MONITOR     Serial | ||||
|   #define SERIAL_PORT_HARDWARE    Serial1 | ||||
| #endif | ||||
|  | ||||
| #endif /* _VARIANT_ARDUINO_STM32_ */ | ||||
| @@ -0,0 +1,368 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2019, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  * Automatically generated from STM32F103Z(C-D-E|F-G))Tx.xml | ||||
|  */ | ||||
| #include "Arduino.h" | ||||
| #include "PeripheralPins.h" | ||||
|  | ||||
| /* ===== | ||||
|  * Note: Commented lines are alternative possibilities which are not used per default. | ||||
|  *       If you change them, you will have to know what you do | ||||
|  * ===== | ||||
|  */ | ||||
|  | ||||
| //*** ADC *** | ||||
|  | ||||
| #ifdef HAL_ADC_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_ADC[] = { | ||||
|   {PA_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 | ||||
|   // {PA_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 | ||||
|   // {PA_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 | ||||
|   {PA_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 | ||||
|   // {PA_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 | ||||
|   // {PA_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 | ||||
|   // {PA_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 | ||||
|   {PA_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 | ||||
|   // {PA_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 | ||||
|   {PA_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 | ||||
|   // {PA_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 | ||||
|   // {PA_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 | ||||
|   // {PA_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 | ||||
|   {PA_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 | ||||
|   {PA_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 | ||||
|   // {PA_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 | ||||
|   // {PA_6,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 | ||||
|   {PA_6,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 | ||||
|   {PA_7,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 | ||||
|   // {PA_7,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 | ||||
|   // {PB_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 | ||||
|   {PB_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 | ||||
|   {PB_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 | ||||
|   // {PB_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 | ||||
|   // {PC_0,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 | ||||
|   {PC_0,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 | ||||
|   // {PC_0,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 | ||||
|   {PC_1,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 | ||||
|   // {PC_1,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 | ||||
|   // {PC_1,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 | ||||
|   // {PC_2,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 | ||||
|   {PC_2,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 | ||||
|   // {PC_2,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 | ||||
|   {PC_3,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 | ||||
|   // {PC_3,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 | ||||
|   // {PC_3,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 | ||||
|   // {PC_4,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 | ||||
|   {PC_4,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 | ||||
|   {PC_5,  ADC1,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 | ||||
|   // {PC_5,  ADC2,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 | ||||
|   {PF_6,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 | ||||
|   {PF_7,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 | ||||
|   {PF_8,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 | ||||
|   {PF_9,  ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 | ||||
|   {PF_10, ADC3,  STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** DAC *** | ||||
|  | ||||
| #ifdef HAL_DAC_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_DAC[] = { | ||||
|   {PA_4,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 | ||||
|   {PA_5,  DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** I2C *** | ||||
|  | ||||
| #ifdef HAL_I2C_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_I2C_SDA[] = { | ||||
|   {PB_7,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_9,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | ||||
|   {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_I2C_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_I2C_SCL[] = { | ||||
|   {PB_6,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_8,  I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_I2C1_ENABLE)}, | ||||
|   {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** PWM *** | ||||
|  | ||||
| #ifdef HAL_TIM_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_PWM[] = { | ||||
|   {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM2_CH1 | ||||
|   // {PA_0,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 1, 0)}, // TIM2_CH1 | ||||
|   // {PA_0,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM5_CH1 | ||||
|   // {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM2_CH2 | ||||
|   // {PA_1,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 2, 0)}, // TIM2_CH2 | ||||
|   {PA_1,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM5_CH2 | ||||
|   {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3 | ||||
|   // {PA_2,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3 | ||||
|   // {PA_2,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3 | ||||
| #ifdef STM32F103xG | ||||
|   // {PA_2,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM9_CH1 | ||||
| #endif | ||||
|   // {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4 | ||||
|   // {PA_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 4, 0)}, // TIM2_CH4 | ||||
|   {PA_3,  TIM5,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM5_CH4 | ||||
| #ifdef STM32F103xG | ||||
|   // {PA_3,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2 | ||||
| #endif | ||||
|   {PA_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1 | ||||
| #ifdef STM32F103xG | ||||
|   // {PA_6,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1 | ||||
| #endif | ||||
|   // {PA_7,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N | ||||
|   // {PA_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2 | ||||
|   {PA_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N | ||||
| #ifdef STM32F103xG | ||||
|   // {PA_7,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1 | ||||
| #endif | ||||
|   {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1 | ||||
|   // {PA_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 0)}, // TIM1_CH1 | ||||
|   {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM1_CH2 | ||||
|   // {PA_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 0)}, // TIM1_CH2 | ||||
|   {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM1_CH3 | ||||
|   // {PA_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 0)}, // TIM1_CH3 | ||||
|   {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM1_CH4 | ||||
|   // {PA_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 4, 0)}, // TIM1_CH4 | ||||
|   {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 1, 0)}, // TIM2_CH1 | ||||
|   // {PA_15, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 1, 0)}, // TIM2_CH1 | ||||
|   // {PB_0,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 2, 1)}, // TIM1_CH2N | ||||
|   {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM3_CH3 | ||||
|   // {PB_0,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 3, 0)}, // TIM3_CH3 | ||||
|   {PB_0,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM8_CH2N | ||||
|   {PB_1,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 3, 1)}, // TIM1_CH3N | ||||
|   // {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM3_CH4 | ||||
|   // {PB_1,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 4, 0)}, // TIM3_CH4 | ||||
|   // {PB_1,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM8_CH3N | ||||
|   {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 2, 0)}, // TIM2_CH2 | ||||
|   // {PB_3,  TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 2, 0)}, // TIM2_CH2 | ||||
|   {PB_4,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 1, 0)}, // TIM3_CH1 | ||||
|   {PB_5,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_PARTIAL, 2, 0)}, // TIM3_CH2 | ||||
|   {PB_6,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1 | ||||
|   {PB_7,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2 | ||||
|   {PB_8,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3 | ||||
| #ifdef STM32F103xG | ||||
|   // {PB_8,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1 | ||||
| #endif | ||||
|   {PB_9,  TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4 | ||||
| #ifdef STM32F103xG | ||||
|   // {PB_9,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1 | ||||
| #endif | ||||
|   // {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3 | ||||
|   {PB_10, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 3, 0)}, // TIM2_CH3 | ||||
|   // {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 4, 0)}, // TIM2_CH4 | ||||
|   {PB_11, TIM2,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4 | ||||
|   {PB_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N | ||||
|   {PB_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N | ||||
| #ifdef STM32F103xG | ||||
|   // {PB_14, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1 | ||||
| #endif | ||||
|   {PB_15, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N | ||||
| #ifdef STM32F103xG | ||||
|   // {PB_15, TIM12,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2 | ||||
| #endif | ||||
|   // {PC_6,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1 | ||||
|   {PC_6,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM8_CH1 | ||||
|   // {PC_7,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 2, 0)}, // TIM3_CH2 | ||||
|   {PC_7,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM8_CH2 | ||||
|   {PC_8,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 3, 0)}, // TIM3_CH3 | ||||
|   // {PC_8,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM8_CH3 | ||||
|   {PC_9,  TIM3,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 4, 0)}, // TIM3_CH4 | ||||
|   // {PC_9,  TIM8,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM8_CH4 | ||||
|   {PD_12, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 1, 0)}, // TIM4_CH1 | ||||
|   {PD_13, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2 | ||||
|   {PD_14, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3 | ||||
|   {PD_15, TIM4,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4 | ||||
| #ifdef STM32F103xG | ||||
|   {PE_5,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1 | ||||
|   {PE_6,  TIM9,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2 | ||||
| #endif | ||||
|   {PE_8,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 1)}, // TIM1_CH1N | ||||
|   {PE_9,  TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 1, 0)}, // TIM1_CH1 | ||||
|   {PE_10, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 1)}, // TIM1_CH2N | ||||
|   {PE_11, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 2, 0)}, // TIM1_CH2 | ||||
|   {PE_12, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 1)}, // TIM1_CH3N | ||||
|   {PE_13, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 3, 0)}, // TIM1_CH3 | ||||
|   {PE_14, TIM1,   STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_ENABLE, 4, 0)}, // TIM1_CH4 | ||||
| #ifdef STM32F103xG | ||||
|   {PF_6,  TIM10,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM10_ENABLE, 1, 0)}, // TIM10_CH1 | ||||
|   {PF_7,  TIM11,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM11_ENABLE, 1, 0)}, // TIM11_CH1 | ||||
|   {PF_8,  TIM13,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM13_ENABLE, 1, 0)}, // TIM13_CH1 | ||||
|   {PF_9,  TIM14,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM14_ENABLE, 1, 0)}, // TIM14_CH1 | ||||
| #endif | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** SERIAL *** | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_TX[] = { | ||||
|   {PA_2,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_9,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_6,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | ||||
|   {PB_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PC_10, UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PC_10, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PC_12, UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PD_5,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_8,  USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_RX[] = { | ||||
|   {PA_3,  USART2,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_10, USART1,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_7,  USART1,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART1_ENABLE)}, | ||||
|   {PB_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PC_11, UART4,   STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PC_11, USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PD_2,  UART5,   STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PD_6,  USART2,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_9,  USART3,  STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_RTS[] = { | ||||
|   {PA_1,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_12, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_14, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PD_4,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_12, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_UART_CTS[] = { | ||||
|   {PA_0,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PA_11, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_13, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)}, | ||||
|   {PD_3,  USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART2_ENABLE)}, | ||||
|   {PD_11, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_ENABLE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** SPI *** | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_MOSI[] = { | ||||
|   {PA_7,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_5,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_MISO[] = { | ||||
|   {PA_6,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_4,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_SCLK[] = { | ||||
|   {PA_5,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PB_3,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PB_3,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SPI_SSEL[] = { | ||||
|   {PA_4,  SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   // {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_SPI1_ENABLE)}, | ||||
|   {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** CAN *** | ||||
|  | ||||
| #ifdef HAL_CAN_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_CAN_RD[] = { | ||||
|   {PA_11, CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_8,  CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)}, | ||||
|   {PD_0,  CAN1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_3)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| #ifdef HAL_CAN_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_CAN_TD[] = { | ||||
|   {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, | ||||
|   {PB_9,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)}, | ||||
|   {PD_1,  CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_3)}, | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** No ETHERNET *** | ||||
|  | ||||
| //*** No QUADSPI *** | ||||
|  | ||||
| //*** USB *** | ||||
|  | ||||
| #ifdef HAL_PCD_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_USB[] = { | ||||
|   {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM | ||||
|   {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
|  | ||||
| //*** No USB_OTG_FS *** | ||||
|  | ||||
| //*** No USB_OTG_HS *** | ||||
|  | ||||
| //*** SD *** | ||||
|  | ||||
| #ifdef HAL_SD_MODULE_ENABLED | ||||
| WEAK const PinMap PinMap_SD[] = { | ||||
|   // {PB_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D4 | ||||
|   // {PB_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D5 | ||||
|   // {PC_6,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D6 | ||||
|   // {PC_7,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D7 | ||||
|   {PC_8,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D0 | ||||
|   {PC_9,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D1 | ||||
|   {PC_10, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D2 | ||||
|   {PC_11, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)}, // SDIO_D3 | ||||
|   {PC_12, SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CK | ||||
|   {PD_2,  SDIO, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)}, // SDIO_CMD | ||||
|   {NC,    NP,    0} | ||||
| }; | ||||
| #endif | ||||
| @@ -0,0 +1,30 @@ | ||||
| /* SYS_WKUP */ | ||||
| #ifdef PWR_WAKEUP_PIN1 | ||||
|   SYS_WKUP1 = PA_0, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN2 | ||||
|   SYS_WKUP2 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN3 | ||||
|   SYS_WKUP3 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN4 | ||||
|   SYS_WKUP4 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN5 | ||||
|   SYS_WKUP5 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN6 | ||||
|   SYS_WKUP6 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN7 | ||||
|   SYS_WKUP7 = NC, | ||||
| #endif | ||||
| #ifdef PWR_WAKEUP_PIN8 | ||||
|   SYS_WKUP8 = NC, | ||||
| #endif | ||||
| /* USB */ | ||||
| #ifdef USBCON | ||||
|   USB_DM = PA_11, | ||||
|   USB_DP = PA_12, | ||||
| #endif | ||||
| @@ -0,0 +1,412 @@ | ||||
| /** | ||||
|   ****************************************************************************** | ||||
|   * @file    stm32f1xx_hal_conf_default.h | ||||
|   * @brief   HAL default configuration file. | ||||
|   ****************************************************************************** | ||||
|   * @attention | ||||
|   * | ||||
|   * <h2><center>© Copyright (c) 2017 STMicroelectronics. | ||||
|   * All rights reserved.</center></h2> | ||||
|   * | ||||
|   * This software component is licensed by ST under BSD 3-Clause license, | ||||
|   * the "License"; You may not use this file except in compliance with the | ||||
|   * License. You may obtain a copy of the License at: | ||||
|   *                        opensource.org/licenses/BSD-3-Clause | ||||
|   * | ||||
|   ****************************************************************************** | ||||
|   */ | ||||
|  | ||||
| /* Define to prevent recursive inclusion -------------------------------------*/ | ||||
| #ifndef __STM32F1xx_HAL_CONF_DEFAULT_H | ||||
| #define __STM32F1xx_HAL_CONF_DEFAULT_H | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif | ||||
|  | ||||
| /* Exported types ------------------------------------------------------------*/ | ||||
| /* Exported constants --------------------------------------------------------*/ | ||||
|  | ||||
| /* ########################## Module Selection ############################## */ | ||||
| /** | ||||
|   * @brief Include the default list of modules to be used in the HAL driver | ||||
|   *        and manage module deactivation | ||||
|   */ | ||||
| #include "stm32yyxx_hal_conf.h" | ||||
| #if 0 | ||||
| /** | ||||
|   * @brief This is the list of modules to be used in the HAL driver | ||||
|   */ | ||||
| #define HAL_MODULE_ENABLED | ||||
| #define HAL_ADC_MODULE_ENABLED | ||||
| #define HAL_CAN_MODULE_ENABLED | ||||
| /*#define HAL_CAN_LEGACY_MODULE_ENABLED*/ | ||||
| #define HAL_CEC_MODULE_ENABLED | ||||
| #define HAL_CORTEX_MODULE_ENABLED | ||||
| #define HAL_CRC_MODULE_ENABLED | ||||
| #define HAL_DAC_MODULE_ENABLED | ||||
| #define HAL_DMA_MODULE_ENABLED | ||||
| #define HAL_ETH_MODULE_ENABLED | ||||
| #define HAL_EXTI_MODULE_ENABLED | ||||
| #define HAL_FLASH_MODULE_ENABLED | ||||
| #define HAL_GPIO_MODULE_ENABLED | ||||
| #define HAL_HCD_MODULE_ENABLED | ||||
| #define HAL_I2C_MODULE_ENABLED | ||||
| #define HAL_I2S_MODULE_ENABLED | ||||
| #define HAL_IRDA_MODULE_ENABLED | ||||
| #define HAL_IWDG_MODULE_ENABLED | ||||
| #define HAL_NAND_MODULE_ENABLED | ||||
| #define HAL_NOR_MODULE_ENABLED | ||||
| #define HAL_PCCARD_MODULE_ENABLED | ||||
| #define HAL_PCD_MODULE_ENABLED | ||||
| #define HAL_PWR_MODULE_ENABLED | ||||
| #define HAL_RCC_MODULE_ENABLED | ||||
| #define HAL_RTC_MODULE_ENABLED | ||||
| #define HAL_SD_MODULE_ENABLED | ||||
| #define HAL_SMARTCARD_MODULE_ENABLED | ||||
| #define HAL_SPI_MODULE_ENABLED | ||||
| #define HAL_SRAM_MODULE_ENABLED | ||||
| #define HAL_TIM_MODULE_ENABLED | ||||
| #define HAL_UART_MODULE_ENABLED | ||||
| #define HAL_USART_MODULE_ENABLED | ||||
| #define HAL_WWDG_MODULE_ENABLED | ||||
| #define HAL_MMC_MODULE_ENABLED | ||||
| #endif | ||||
|  | ||||
| /* ########################## Oscillator Values adaptation ####################*/ | ||||
| /** | ||||
|   * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. | ||||
|   *        This value is used by the RCC HAL module to compute the system frequency | ||||
|   *        (when HSE is used as system clock source, directly or through the PLL). | ||||
|   */ | ||||
| #if !defined  (HSE_VALUE) | ||||
| #if defined(USE_STM3210C_EVAL) | ||||
| #define HSE_VALUE    25000000U /*!< Value of the External oscillator in Hz */ | ||||
| #else | ||||
| #define HSE_VALUE    8000000U /*!< Value of the External oscillator in Hz */ | ||||
| #endif | ||||
| #endif /* HSE_VALUE */ | ||||
|  | ||||
| #if !defined  (HSE_STARTUP_TIMEOUT) | ||||
| #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */ | ||||
| #endif /* HSE_STARTUP_TIMEOUT */ | ||||
|  | ||||
| /** | ||||
|   * @brief Internal High Speed oscillator (HSI) value. | ||||
|   *        This value is used by the RCC HAL module to compute the system frequency | ||||
|   *        (when HSI is used as system clock source, directly or through the PLL). | ||||
|   */ | ||||
| #if !defined  (HSI_VALUE) | ||||
| #define HSI_VALUE              8000000U  /*!< Value of the Internal oscillator in Hz */ | ||||
| #endif /* HSI_VALUE */ | ||||
|  | ||||
| /** | ||||
|   * @brief Internal Low Speed oscillator (LSI) value. | ||||
|   */ | ||||
| #if !defined  (LSI_VALUE) | ||||
| #define LSI_VALUE               40000U     /*!< LSI Typical Value in Hz */ | ||||
| #endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz | ||||
|                                                 The real value may vary depending on the variations | ||||
|                                                 in voltage and temperature. */ | ||||
| /** | ||||
|   * @brief External Low Speed oscillator (LSE) value. | ||||
|   *        This value is used by the UART, RTC HAL module to compute the system frequency | ||||
|   */ | ||||
| #if !defined  (LSE_VALUE) | ||||
| #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */ | ||||
| #endif /* LSE_VALUE */ | ||||
|  | ||||
| #if !defined  (LSE_STARTUP_TIMEOUT) | ||||
| #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */ | ||||
| #endif /* LSE_STARTUP_TIMEOUT */ | ||||
|  | ||||
| /* Tip: To avoid modifying this file each time you need to use different HSE, | ||||
|    ===  you can define the HSE value in your toolchain compiler preprocessor. */ | ||||
|  | ||||
| /* ########################### System Configuration ######################### */ | ||||
| /** | ||||
|   * @brief This is the HAL system configuration section | ||||
|   */ | ||||
| #if !defined(VDD_VALUE) | ||||
| #define  VDD_VALUE                    3300U /*!< Value of VDD in mv */ | ||||
| #endif | ||||
| #if !defined (TICK_INT_PRIORITY) | ||||
| #define  TICK_INT_PRIORITY            0x00U /*!< tick interrupt priority */ | ||||
| #endif | ||||
| #if !defined (USE_RTOS) | ||||
| #define  USE_RTOS                     0U | ||||
| #endif | ||||
| #if !defined (PREFETCH_ENABLE) | ||||
| #define  PREFETCH_ENABLE              1U | ||||
| #endif | ||||
|  | ||||
| #define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */ | ||||
| #define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */ | ||||
| #define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */ | ||||
| #define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */ | ||||
| #define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */ | ||||
| #define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */ | ||||
| #define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */ | ||||
| #define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */ | ||||
| #define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */ | ||||
| #define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */ | ||||
| #define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */ | ||||
| #define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */ | ||||
| #define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */ | ||||
| #define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */ | ||||
| #define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */ | ||||
| #define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */ | ||||
| #define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */ | ||||
| #define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */ | ||||
| #define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */ | ||||
| #define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */ | ||||
| #define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */ | ||||
| #define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */ | ||||
| #define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */ | ||||
|  | ||||
| /* ########################## Assert Selection ############################## */ | ||||
| /** | ||||
|   * @brief Uncomment the line below to expanse the "assert_param" macro in the | ||||
|   *        HAL drivers code | ||||
|   */ | ||||
| /* #define USE_FULL_ASSERT    1U */ | ||||
|  | ||||
| /* ################## Ethernet peripheral configuration ##################### */ | ||||
|  | ||||
| /* Section 1 : Ethernet peripheral configuration */ | ||||
|  | ||||
| /* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ | ||||
| #define MAC_ADDR0   2U | ||||
| #define MAC_ADDR1   0U | ||||
| #define MAC_ADDR2   0U | ||||
| #define MAC_ADDR3   0U | ||||
| #define MAC_ADDR4   0U | ||||
| #define MAC_ADDR5   0U | ||||
|  | ||||
| /* Definition of the Ethernet driver buffers size and count */ | ||||
| #define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */ | ||||
| #define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */ | ||||
| #define ETH_RXBUFNB                    8U                  /* 8 Rx buffers of size ETH_RX_BUF_SIZE  */ | ||||
| #define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */ | ||||
|  | ||||
| /* Section 2: PHY configuration section */ | ||||
|  | ||||
| /* DP83848 PHY Address*/ | ||||
| #define DP83848_PHY_ADDRESS             0x01U | ||||
| /* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ | ||||
| #define PHY_RESET_DELAY                 0x000000FFU | ||||
| /* PHY Configuration delay */ | ||||
| #define PHY_CONFIG_DELAY                0x00000FFFU | ||||
|  | ||||
| #define PHY_READ_TO                     0x0000FFFFU | ||||
| #define PHY_WRITE_TO                    0x0000FFFFU | ||||
|  | ||||
| /* Section 3: Common PHY Registers */ | ||||
|  | ||||
| #define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */ | ||||
| #define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */ | ||||
|  | ||||
| #define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */ | ||||
| #define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */ | ||||
| #define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */ | ||||
| #define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */ | ||||
| #define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */ | ||||
| #define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */ | ||||
| #define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */ | ||||
| #define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */ | ||||
| #define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */ | ||||
| #define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */ | ||||
|  | ||||
| #define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */ | ||||
| #define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */ | ||||
| #define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */ | ||||
|  | ||||
| /* Section 4: Extended PHY Registers */ | ||||
|  | ||||
| #define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */ | ||||
| #define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */ | ||||
| #define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */ | ||||
|  | ||||
| #define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */ | ||||
| #define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */ | ||||
| #define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */ | ||||
|  | ||||
| #define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */ | ||||
| #define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */ | ||||
|  | ||||
| #define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */ | ||||
| #define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */ | ||||
|  | ||||
| /* ################## SPI peripheral configuration ########################## */ | ||||
|  | ||||
| /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver | ||||
| * Activated: CRC code is present inside driver | ||||
| * Deactivated: CRC code cleaned from driver | ||||
| */ | ||||
| #if !defined (USE_SPI_CRC) | ||||
| #define USE_SPI_CRC                     0U | ||||
| #endif | ||||
|  | ||||
| /* Includes ------------------------------------------------------------------*/ | ||||
| /** | ||||
|   * @brief Include module's header file | ||||
|   */ | ||||
|  | ||||
| #ifdef HAL_RCC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_rcc.h" | ||||
| #endif /* HAL_RCC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_GPIO_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_gpio.h" | ||||
| #endif /* HAL_GPIO_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_EXTI_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_exti.h" | ||||
| #endif /* HAL_EXTI_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_DMA_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_dma.h" | ||||
| #endif /* HAL_DMA_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_ETH_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_eth.h" | ||||
| #endif /* HAL_ETH_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_CAN_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_can.h" | ||||
| #endif /* HAL_CAN_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_CAN_LEGACY_MODULE_ENABLED | ||||
|   #include "Legacy/stm32f1xx_hal_can_legacy.h" | ||||
| #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_CEC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_cec.h" | ||||
| #endif /* HAL_CEC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_CORTEX_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_cortex.h" | ||||
| #endif /* HAL_CORTEX_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_ADC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_adc.h" | ||||
| #endif /* HAL_ADC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_CRC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_crc.h" | ||||
| #endif /* HAL_CRC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_DAC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_dac.h" | ||||
| #endif /* HAL_DAC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_FLASH_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_flash.h" | ||||
| #endif /* HAL_FLASH_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_SRAM_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_sram.h" | ||||
| #endif /* HAL_SRAM_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_NOR_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_nor.h" | ||||
| #endif /* HAL_NOR_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_I2C_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_i2c.h" | ||||
| #endif /* HAL_I2C_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_I2S_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_i2s.h" | ||||
| #endif /* HAL_I2S_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_IWDG_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_iwdg.h" | ||||
| #endif /* HAL_IWDG_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_PWR_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_pwr.h" | ||||
| #endif /* HAL_PWR_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_RTC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_rtc.h" | ||||
| #endif /* HAL_RTC_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_PCCARD_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_pccard.h" | ||||
| #endif /* HAL_PCCARD_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_SD_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_sd.h" | ||||
| #endif /* HAL_SD_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_NAND_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_nand.h" | ||||
| #endif /* HAL_NAND_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_SPI_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_spi.h" | ||||
| #endif /* HAL_SPI_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_TIM_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_tim.h" | ||||
| #endif /* HAL_TIM_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_UART_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_uart.h" | ||||
| #endif /* HAL_UART_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_USART_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_usart.h" | ||||
| #endif /* HAL_USART_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_IRDA_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_irda.h" | ||||
| #endif /* HAL_IRDA_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_SMARTCARD_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_smartcard.h" | ||||
| #endif /* HAL_SMARTCARD_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_WWDG_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_wwdg.h" | ||||
| #endif /* HAL_WWDG_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_PCD_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_pcd.h" | ||||
| #endif /* HAL_PCD_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_HCD_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_hcd.h" | ||||
| #endif /* HAL_HCD_MODULE_ENABLED */ | ||||
|  | ||||
| #ifdef HAL_MMC_MODULE_ENABLED | ||||
| #include "stm32f1xx_hal_mmc.h" | ||||
| #endif /* HAL_MMC_MODULE_ENABLED */ | ||||
|  | ||||
| /* Exported macro ------------------------------------------------------------*/ | ||||
| #ifdef  USE_FULL_ASSERT | ||||
| /** | ||||
|   * @brief  The assert_param macro is used for function's parameters check. | ||||
|   * @param  expr If expr is false, it calls assert_failed function | ||||
|   *         which reports the name of the source file and the source | ||||
|   *         line number of the call that failed. | ||||
|   *         If expr is true, it returns no value. | ||||
|   * @retval None | ||||
|   */ | ||||
| #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) | ||||
| /* Exported functions ------------------------------------------------------- */ | ||||
| void assert_failed(uint8_t *file, uint32_t line); | ||||
| #else | ||||
| #define assert_param(expr) ((void)0U) | ||||
| #endif /* USE_FULL_ASSERT */ | ||||
|  | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } | ||||
| #endif | ||||
|  | ||||
| #endif /* __STM32F1xx_HAL_CONF_DEFAULT_H */ | ||||
|  | ||||
|  | ||||
| /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ | ||||
							
								
								
									
										200
									
								
								buildroot/share/PlatformIO/variants/MARLIN_F103Zx/ldscript.ld
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										200
									
								
								buildroot/share/PlatformIO/variants/MARLIN_F103Zx/ldscript.ld
									
									
									
									
									
										Normal file
									
								
							| @@ -0,0 +1,200 @@ | ||||
| /* | ||||
| ****************************************************************************** | ||||
| ** | ||||
|  | ||||
| **  File        : LinkerScript.ld | ||||
| ** | ||||
| **  Author		: Auto-generated by STM32CubeIDE | ||||
| ** | ||||
| **  Abstract    : Linker script for STM32F103Z(C/D/E/G/GTx Device from STM32F1 series | ||||
| **                      256/386/512K/786/1024bytes FLASH | ||||
| **                      48/64/96Kbytes RAM | ||||
| ** | ||||
| **                Set heap size, stack size and stack location according | ||||
| **                to application requirements. | ||||
| ** | ||||
| **                Set memory bank area and size if external memory is used. | ||||
| ** | ||||
| **  Target      : STMicroelectronics STM32 | ||||
| ** | ||||
| **  Distribution: The file is distributed as is without any warranty | ||||
| **                of any kind. | ||||
| ** | ||||
| ***************************************************************************** | ||||
| ** @attention | ||||
| ** | ||||
| ** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> | ||||
| ** | ||||
| ** Redistribution and use in source and binary forms, with or without modification, | ||||
| ** are permitted provided that the following conditions are met: | ||||
| **   1. Redistributions of source code must retain the above copyright notice, | ||||
| **      this list of conditions and the following disclaimer. | ||||
| **   2. Redistributions in binary form must reproduce the above copyright notice, | ||||
| **      this list of conditions and the following disclaimer in the documentation | ||||
| **      and/or other materials provided with the distribution. | ||||
| **   3. Neither the name of STMicroelectronics nor the names of its contributors | ||||
| **      may be used to endorse or promote products derived from this software | ||||
| **      without specific prior written permission. | ||||
| ** | ||||
| ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||||
| ** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||||
| ** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||||
| ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE | ||||
| ** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||||
| ** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | ||||
| ** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||||
| ** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | ||||
| ** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||||
| ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||||
| ** | ||||
| ***************************************************************************** | ||||
| */ | ||||
|  | ||||
| /* Entry Point */ | ||||
| ENTRY(Reset_Handler) | ||||
|  | ||||
| /* Highest address of the user mode stack */ | ||||
| _estack = 0x20000000 + LD_MAX_DATA_SIZE;	/* end of "RAM" Ram type memory */ | ||||
| _Min_Heap_Size = 0x200;      /* required amount of heap  */ | ||||
| _Min_Stack_Size = 0x400; /* required amount of stack */ | ||||
|  | ||||
| /* Memories definition */ | ||||
| MEMORY | ||||
| { | ||||
|   RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE | ||||
|   FLASH	(rx)	: ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET | ||||
| } | ||||
|  | ||||
| /* Sections */ | ||||
| SECTIONS | ||||
| { | ||||
|   /* The startup code into "FLASH" Rom type memory */ | ||||
|   .isr_vector : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     KEEP(*(.isr_vector)) /* Startup code */ | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   /* The program code and other data into "FLASH" Rom type memory */ | ||||
|   .text : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     *(.text)           /* .text sections (code) */ | ||||
|     *(.text*)          /* .text* sections (code) */ | ||||
|     *(.glue_7)         /* glue arm to thumb code */ | ||||
|     *(.glue_7t)        /* glue thumb to arm code */ | ||||
|     *(.eh_frame) | ||||
|  | ||||
|     KEEP (*(.init)) | ||||
|     KEEP (*(.fini)) | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _etext = .;        /* define a global symbols at end of code */ | ||||
|   } >FLASH | ||||
|  | ||||
|   /* Constant data into "FLASH" Rom type memory */ | ||||
|   .rodata : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     *(.rodata)         /* .rodata sections (constants, strings, etc.) */ | ||||
|     *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */ | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   .ARM.extab   : {  | ||||
|   	. = ALIGN(4); | ||||
|   	*(.ARM.extab* .gnu.linkonce.armextab.*) | ||||
|   	. = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .ARM : { | ||||
|     . = ALIGN(4); | ||||
|     __exidx_start = .; | ||||
|     *(.ARM.exidx*) | ||||
|     __exidx_end = .; | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   .preinit_array     : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__preinit_array_start = .); | ||||
|     KEEP (*(.preinit_array*)) | ||||
|     PROVIDE_HIDDEN (__preinit_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .init_array : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__init_array_start = .); | ||||
|     KEEP (*(SORT(.init_array.*))) | ||||
|     KEEP (*(.init_array*)) | ||||
|     PROVIDE_HIDDEN (__init_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|   .fini_array : | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     PROVIDE_HIDDEN (__fini_array_start = .); | ||||
|     KEEP (*(SORT(.fini_array.*))) | ||||
|     KEEP (*(.fini_array*)) | ||||
|     PROVIDE_HIDDEN (__fini_array_end = .); | ||||
|     . = ALIGN(4); | ||||
|   } >FLASH | ||||
|  | ||||
|   /* Used by the startup to initialize data */ | ||||
|   _sidata = LOADADDR(.data); | ||||
|  | ||||
|   /* Initialized data sections into "RAM" Ram type memory */ | ||||
|   .data :  | ||||
|   { | ||||
|     . = ALIGN(4); | ||||
|     _sdata = .;        /* create a global symbol at data start */ | ||||
|     *(.data)           /* .data sections */ | ||||
|     *(.data*)          /* .data* sections */ | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _edata = .;        /* define a global symbol at data end */ | ||||
|   } >RAM AT> FLASH | ||||
|  | ||||
|    | ||||
|   /* Uninitialized data section into "RAM" Ram type memory */ | ||||
|   . = ALIGN(4); | ||||
|   .bss : | ||||
|   { | ||||
|     /* This is used by the startup in order to initialize the .bss secion */ | ||||
|     _sbss = .;         /* define a global symbol at bss start */ | ||||
|     __bss_start__ = _sbss; | ||||
|     *(.bss) | ||||
|     *(.bss*) | ||||
|     *(COMMON) | ||||
|  | ||||
|     . = ALIGN(4); | ||||
|     _ebss = .;         /* define a global symbol at bss end */ | ||||
|     __bss_end__ = _ebss; | ||||
|   } >RAM | ||||
|  | ||||
|   /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */ | ||||
|   ._user_heap_stack : | ||||
|   { | ||||
|     . = ALIGN(8); | ||||
|     PROVIDE ( end = . ); | ||||
|     PROVIDE ( _end = . ); | ||||
|     . = . + _Min_Heap_Size; | ||||
|     . = . + _Min_Stack_Size; | ||||
|     . = ALIGN(8); | ||||
|   } >RAM | ||||
|  | ||||
|    | ||||
|  | ||||
|   /* Remove information from the compiler libraries */ | ||||
|   /DISCARD/ : | ||||
|   { | ||||
|     libc.a ( * ) | ||||
|     libm.a ( * ) | ||||
|     libgcc.a ( * ) | ||||
|   } | ||||
|  | ||||
|   .ARM.attributes 0 : { *(.ARM.attributes) } | ||||
| } | ||||
|  | ||||
							
								
								
									
										222
									
								
								buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.cpp
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										222
									
								
								buildroot/share/PlatformIO/variants/MARLIN_F103Zx/variant.cpp
									
									
									
									
									
										Normal file
									
								
							| @@ -0,0 +1,222 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2019, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  */ | ||||
|  | ||||
| #include "pins_arduino.h" | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif | ||||
|  | ||||
| // Digital PinName array | ||||
| const PinName digitalPin[] = { | ||||
|   PA_0,  //D0 | ||||
|   PA_1,  //D1 | ||||
|   PA_2,  //D2 | ||||
|   PA_3,  //D3 | ||||
|   PA_4,  //D4 | ||||
|   PA_5,  //D5 | ||||
|   PA_6,  //D6 | ||||
|   PA_7,  //D7 | ||||
|   PA_8,  //D8 | ||||
|   PA_9,  //D9 | ||||
|   PA_10, //D10 | ||||
|   PA_11, //D11 | ||||
|   PA_12, //D12 | ||||
|   PA_13, //D13 | ||||
|   PA_14, //D14 | ||||
|   PA_15, //D15 | ||||
|  | ||||
|   PB_0,  //D16 | ||||
|   PB_1,  //D17 | ||||
|   PB_2,  //D18 | ||||
|   PB_3,  //D19 | ||||
|   PB_4,  //D20 | ||||
|   PB_5,  //D21 | ||||
|   PB_6,  //D22 | ||||
|   PB_7,  //D23 | ||||
|   PB_8,  //D24 | ||||
|   PB_9,  //D25 | ||||
|   PB_10, //D26 | ||||
|   PB_11, //D27 | ||||
|   PB_12, //D28 | ||||
|   PB_13, //D29 | ||||
|   PB_14, //D30 | ||||
|   PB_15, //D31 | ||||
|  | ||||
|   PC_0,  //D32 | ||||
|   PC_1,  //D33 | ||||
|   PC_2,  //D34 | ||||
|   PC_3,  //D35 | ||||
|   PC_4,  //D36 | ||||
|   PC_5,  //D37 | ||||
|   PC_6,  //D38 | ||||
|   PC_7,  //D39 | ||||
|   PC_8,  //D40 | ||||
|   PC_9,  //D41 | ||||
|   PC_10, //D42 | ||||
|   PC_11, //D43 | ||||
|   PC_12, //D44 | ||||
|   PC_13, //D45 | ||||
|   PC_14, //D46 | ||||
|   PC_15, //D47 | ||||
|  | ||||
|   PD_0,  //D48 | ||||
|   PD_1,  //D49 | ||||
|   PD_2,  //D50 | ||||
|   PD_3,  //D51 | ||||
|   PD_4,  //D52 | ||||
|   PD_5,  //D53 | ||||
|   PD_6,  //D54 | ||||
|   PD_7,  //D55 | ||||
|   PD_8,  //D56 | ||||
|   PD_9,  //D57 | ||||
|   PD_10, //D58 | ||||
|   PD_11, //D59 | ||||
|   PD_12, //D60 | ||||
|   PD_13, //D61 | ||||
|   PD_14, //D62 | ||||
|   PD_15, //D63 | ||||
|  | ||||
|   PE_0,  //D64 | ||||
|   PE_1,  //D65 | ||||
|   PE_2,  //D66 | ||||
|   PE_3,  //D67 | ||||
|   PE_4,  //D68 | ||||
|   PE_5,  //D69 | ||||
|   PE_6,  //D70 | ||||
|   PE_7,  //D71 | ||||
|   PE_8,  //D72 | ||||
|   PE_9,  //D73 | ||||
|   PE_10, //D74 | ||||
|   PE_11, //D75 | ||||
|   PE_12, //D76 | ||||
|   PE_13, //D77 | ||||
|   PE_14, //D78 | ||||
|   PE_15, //D79 | ||||
|  | ||||
|   PF_0,  //D80 | ||||
|   PF_1,  //D81 | ||||
|   PF_2,  //D82 | ||||
|   PF_3,  //D83 | ||||
|   PF_4,  //D84 | ||||
|   PF_5,  //D85 | ||||
|   PF_6,  //D86 | ||||
|   PF_7,  //D87 | ||||
|   PF_8,  //D88 | ||||
|   PF_9,  //D89 | ||||
|   PF_10, //D90 | ||||
|   PF_11, //D91 | ||||
|   PF_12, //D92 | ||||
|   PF_13, //D93 | ||||
|   PF_14, //D94 | ||||
|   PF_15, //D95 | ||||
|  | ||||
|   PG_0,  //D96 | ||||
|   PG_1,  //D97 | ||||
|   PG_2,  //D98 | ||||
|   PG_3,  //D99 | ||||
|   PG_4,  //D100 | ||||
|   PG_5,  //D101 | ||||
|   PG_6,  //D102 | ||||
|   PG_7,  //D103 | ||||
|   PG_8,  //D104 | ||||
|   PG_9,  //D105 | ||||
|   PG_10, //D106 | ||||
|   PG_11, //D107 | ||||
|   PG_12, //D108 | ||||
|   PG_13, //D109 | ||||
|   PG_14, //D110 | ||||
|   PG_15  //D111 | ||||
| }; | ||||
|  | ||||
| // Analog (Ax) pin number array | ||||
| const uint32_t analogInputPin[] = { | ||||
|   0,  // A0,  PA0 | ||||
|   1,  // A1,  PA1 | ||||
|   2,  // A2,  PA2 | ||||
|   3,  // A3,  PA3 | ||||
|   4,  // A4,  PA4 | ||||
|   5,  // A5,  PA5 | ||||
|   6,  // A6,  PA6 | ||||
|   7,  // A7,  PA7 | ||||
|   16, // A8,  PB0 | ||||
|   17, // A9,  PB1 | ||||
|   32, // A10, PC0 | ||||
|   33, // A11, PC1 | ||||
|   34, // A12, PC2 | ||||
|   35, // A13, PC3 | ||||
|   36, // A14, PC4 | ||||
|   37, // A15, PC5 | ||||
|   86, // A16, PF6 | ||||
|   87, // A17, PF7 | ||||
|   88, // A18, PF8 | ||||
|   89, // A19, PF9 | ||||
|   90  // A20, PF10 | ||||
| }; | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } | ||||
| #endif | ||||
|  | ||||
| // ---------------------------------------------------------------------------- | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif | ||||
|  | ||||
| /** | ||||
|   * @brief  System Clock Configuration | ||||
|   * @param  None | ||||
|   * @retval None | ||||
|   */ | ||||
| WEAK void SystemClock_Config(void) | ||||
| { | ||||
|   RCC_OscInitTypeDef RCC_OscInitStruct = {}; | ||||
|   RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; | ||||
|   RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; | ||||
|  | ||||
|   /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; | ||||
|   RCC_OscInitStruct.HSEState = RCC_HSE_ON; | ||||
|   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; | ||||
|   RCC_OscInitStruct.HSIState = RCC_HSI_ON; | ||||
|   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | ||||
|   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; | ||||
|   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; | ||||
|   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { | ||||
|     Error_Handler(); | ||||
|   } | ||||
|   /* Initializes the CPU, AHB and APB busses clocks */ | ||||
|   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | ||||
|                                 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; | ||||
|   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; | ||||
|   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; | ||||
|   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; | ||||
|   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; | ||||
|  | ||||
|   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { | ||||
|     Error_Handler(); | ||||
|   } | ||||
|  | ||||
|   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB; | ||||
|   PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6; | ||||
|   PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5; | ||||
|   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { | ||||
|     Error_Handler(); | ||||
|   } | ||||
| } | ||||
|  | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } | ||||
| #endif | ||||
							
								
								
									
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							| @@ -0,0 +1,232 @@ | ||||
| /* | ||||
|  ******************************************************************************* | ||||
|  * Copyright (c) 2019, STMicroelectronics | ||||
|  * All rights reserved. | ||||
|  * | ||||
|  * This software component is licensed by ST under BSD 3-Clause license, | ||||
|  * the "License"; You may not use this file except in compliance with the | ||||
|  * License. You may obtain a copy of the License at: | ||||
|  *                        opensource.org/licenses/BSD-3-Clause | ||||
|  * | ||||
|  ******************************************************************************* | ||||
|  */ | ||||
|  | ||||
| #ifndef _VARIANT_ARDUINO_STM32_ | ||||
| #define _VARIANT_ARDUINO_STM32_ | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| extern "C" { | ||||
| #endif // __cplusplus | ||||
|  | ||||
| /*---------------------------------------------------------------------------- | ||||
|  *        Pins | ||||
|  *----------------------------------------------------------------------------*/ | ||||
| #define  PA0  0 | ||||
| #define  PA1  1 | ||||
| #define  PA2  2 | ||||
| #define  PA3  3 | ||||
| #define  PA4  4 | ||||
| #define  PA5  5 | ||||
| #define  PA6  6 | ||||
| #define  PA7  7 | ||||
| #define  PA8  8 | ||||
| #define  PA9  9 | ||||
| #define  PA10 10 | ||||
| #define  PA11 11 | ||||
| #define  PA12 12 | ||||
| #define  PA13 13 | ||||
| #define  PA14 14 | ||||
| #define  PA15 15 | ||||
|  | ||||
| #define  PB0  16 | ||||
| #define  PB1  17 | ||||
| #define  PB2  18 | ||||
| #define  PB3  19 | ||||
| #define  PB4  20 | ||||
| #define  PB5  21 | ||||
| #define  PB6  22 | ||||
| #define  PB7  23 | ||||
| #define  PB8  24 | ||||
| #define  PB9  25 | ||||
| #define  PB10 26 | ||||
| #define  PB11 27 | ||||
| #define  PB12 28 | ||||
| #define  PB13 29 | ||||
| #define  PB14 30 | ||||
| #define  PB15 31 | ||||
|  | ||||
| #define  PC0  32 | ||||
| #define  PC1  33 | ||||
| #define  PC2  34 | ||||
| #define  PC3  35 | ||||
| #define  PC4  36 | ||||
| #define  PC5  37 | ||||
| #define  PC6  38 | ||||
| #define  PC7  39 | ||||
| #define  PC8  40 | ||||
| #define  PC9  41 | ||||
| #define  PC10 42 | ||||
| #define  PC11 43 | ||||
| #define  PC12 44 | ||||
| #define  PC13 45 | ||||
| #define  PC14 46 | ||||
| #define  PC15 47 | ||||
|  | ||||
| #define  PD0  48 | ||||
| #define  PD1  49 | ||||
| #define  PD2  50 | ||||
| #define  PD3  51 | ||||
| #define  PD4  52 | ||||
| #define  PD5  53 | ||||
| #define  PD6  54 | ||||
| #define  PD7  55 | ||||
| #define  PD8  56 | ||||
| #define  PD9  57 | ||||
| #define  PD10 58 | ||||
| #define  PD11 59 | ||||
| #define  PD12 60 | ||||
| #define  PD13 61 | ||||
| #define  PD14 62 | ||||
| #define  PD15 63 | ||||
|  | ||||
| #define  PE0  64 | ||||
| #define  PE1  65 | ||||
| #define  PE2  66 | ||||
| #define  PE3  67 | ||||
| #define  PE4  68 | ||||
| #define  PE5  69 | ||||
| #define  PE6  70 | ||||
| #define  PE7  71 | ||||
| #define  PE8  72 | ||||
| #define  PE9  73 | ||||
| #define  PE10 74 | ||||
| #define  PE11 75 | ||||
| #define  PE12 76 | ||||
| #define  PE13 77 | ||||
| #define  PE14 78 | ||||
| #define  PE15 79 | ||||
|  | ||||
| #define  PF0  80 | ||||
| #define  PF1  81 | ||||
| #define  PF2  82 | ||||
| #define  PF3  83 | ||||
| #define  PF4  84 | ||||
| #define  PF5  85 | ||||
| #define  PF6  86 | ||||
| #define  PF7  87 | ||||
| #define  PF8  88 | ||||
| #define  PF9  89 | ||||
| #define  PF10 90 | ||||
| #define  PF11 91 | ||||
| #define  PF12 92 | ||||
| #define  PF13 93 | ||||
| #define  PF14 94 | ||||
| #define  PF15 95 | ||||
|  | ||||
| #define  PG0  96 | ||||
| #define  PG1  97 | ||||
| #define  PG2  98 | ||||
| #define  PG3  99 | ||||
| #define  PG4  100 | ||||
| #define  PG5  101 | ||||
| #define  PG6  102 | ||||
| #define  PG7  103 | ||||
| #define  PG8  104 | ||||
| #define  PG9  105 | ||||
| #define  PG10 106 | ||||
| #define  PG11 107 | ||||
| #define  PG12 108 | ||||
| #define  PG13 109 | ||||
| #define  PG14 110 | ||||
| #define  PG15 111 | ||||
|  | ||||
| // This must be a literal | ||||
| #define NUM_DIGITAL_PINS        112 | ||||
| #define NUM_ANALOG_INPUTS       21 | ||||
|  | ||||
| // On-board LED pin number | ||||
| #ifdef ARDUINO_VCCGND_F103ZET6_MINI | ||||
| #define LED_BUILTIN             PG15 | ||||
| #elif defined(ARDUINO_VCCGND_F103ZET6) | ||||
| #define LED_BUILTIN             PC13 | ||||
| #elif !defined(LED_BUILTIN) | ||||
| #define LED_BUILTIN             PC13 | ||||
| #endif | ||||
|  | ||||
| // On-board user button | ||||
| #ifndef USER_BTN | ||||
| #define USER_BTN                PB1 | ||||
| #endif | ||||
|  | ||||
| // SPI Definitions | ||||
| #ifdef ARDUINO_VCCGND_F103ZET6 | ||||
| #define PIN_SPI_SS              PA15 | ||||
| #define PIN_SPI_MOSI            PB5 | ||||
| #define PIN_SPI_MISO            PB4 | ||||
| #define PIN_SPI_SCK             PB3 | ||||
| #else | ||||
| #define PIN_SPI_SS              PC4 | ||||
| #define PIN_SPI_MOSI            PA7 | ||||
| #define PIN_SPI_MISO            PA6 | ||||
| #define PIN_SPI_SCK             PA5 | ||||
| #endif | ||||
|  | ||||
| // I2C Definitions | ||||
| #define PIN_WIRE_SDA            PB7 | ||||
| #define PIN_WIRE_SCL            PB6 | ||||
|  | ||||
| // Timer Definitions (optional) | ||||
| // Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin | ||||
| #define TIMER_TONE              TIM6 | ||||
| #define TIMER_SERVO             TIM7 | ||||
|  | ||||
| // UART Definitions | ||||
| // Define here Serial instance number to map on Serial generic name | ||||
| #define SERIAL_UART_INSTANCE    1 | ||||
|  | ||||
| // Default pin used for 'Serial' instance (ex: ST-Link) | ||||
| // Mandatory for Firmata | ||||
| #define PIN_SERIAL_RX           PA10 | ||||
| #define PIN_SERIAL_TX           PA9 | ||||
|  | ||||
| // Default pin used for 'Serial2' instance | ||||
| #define PIN_SERIAL2_RX          PA3 | ||||
| #define PIN_SERIAL2_TX          PA2 | ||||
|  | ||||
| // Default pin used for 'Serial3' instance | ||||
| #define PIN_SERIAL3_RX          PB11 | ||||
| #define PIN_SERIAL3_TX          PB10 | ||||
|  | ||||
| /* Extra HAL modules */ | ||||
| #define HAL_DAC_MODULE_ENABLED | ||||
| #define HAL_SD_MODULE_ENABLED | ||||
| #define HAL_SRAM_MODULE_ENABLED | ||||
|  | ||||
| #ifdef __cplusplus | ||||
| } // extern "C" | ||||
| #endif | ||||
| /*---------------------------------------------------------------------------- | ||||
|  *        Arduino objects - C++ only | ||||
|  *----------------------------------------------------------------------------*/ | ||||
|  | ||||
| #ifdef __cplusplus | ||||
|   // These serial port names are intended to allow libraries and architecture-neutral | ||||
|   // sketches to automatically default to the correct port name for a particular type | ||||
|   // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, | ||||
|   // the first hardware serial port whose RX/TX pins are not dedicated to another use. | ||||
|   // | ||||
|   // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor | ||||
|   // | ||||
|   // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial | ||||
|   // | ||||
|   // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library | ||||
|   // | ||||
|   // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins. | ||||
|   // | ||||
|   // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX | ||||
|   //                            pins are NOT connected to anything by default. | ||||
|   #define SERIAL_PORT_MONITOR     Serial | ||||
|   #define SERIAL_PORT_HARDWARE    Serial1 | ||||
| #endif | ||||
|  | ||||
| #endif /* _VARIANT_ARDUINO_STM32_ */ | ||||
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