2016-03-25 01:19:46 -05:00
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/**
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2016-03-24 13:01:20 -05:00
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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2013-06-06 17:49:25 -05:00
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#ifndef ULCDST7920_H
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#define ULCDST7920_H
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#include "Marlin.h"
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2015-07-31 00:21:18 -05:00
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#if ENABLED(U8GLIB_ST7920)
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2013-06-06 17:49:25 -05:00
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#define ST7920_CLK_PIN LCD_PINS_D4
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#define ST7920_DAT_PIN LCD_PINS_ENABLE
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#define ST7920_CS_PIN LCD_PINS_RS
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2014-02-17 04:58:36 -06:00
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//#define PAGE_HEIGHT 8 //128 byte framebuffer
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Distribute GLCD screen updates in time
Currently we draw and send the screens for a graphical LCD all at once.
We draw in two or four parts but draw them directly behind each other.
For the tested status screen this takes 59-62ms in a single block.
During this time nothing else (except the interrupts) can be done.
When printing a sequence of very short moves the buffer drains - sometimes until it's empty.
This PR splits the screen update into parts.
Currently we have 10 time slots. During the first one the complete screen is drawn. (60,0,0,0,0,0,0,0,0,0,0)
Here i introduce pauses for doing other things. (30,30,0,0,0,0,0,0) or (15,15,15,15,0,0,0,0,0,0)
Drawing in consecutive time slots prevents from lagging too much. Even with a 4 stripe display all the drawing is done after 400ms.
Previous experiments with a even better distribution of the time slots like
(30,0,0,0,0,30,0,0,0,0) and (15,0,15,0,15,0,15,0,0,0) did not feel good when using the menu, because of too much lag.
Because of the previous PRs to speed up the display updates and especially reducing the difference between drawing 2 or 4 stripes,
it now makes sense for the REPRAP_DISCOUNT_FULL_GRAPHIC_SMART_CONTROLLER to go from 2 to 4 stripes. This costs about 1-2ms per complete
screen update, but is payed back by having partial updates lasting only the half time and two additional brakes. Also ~256 byte of
framebuffer are saved in RAM.
13:45:59.213 : echo: #:17 >:13 s:30; #:16 >:13 s:29; S#:33 S>:26 S:59
13:46:00.213 : echo: #:16 >:14 s:30; #:17 >:13 s:30; S#:33 S>:27 S:60
13:46:01.215 : echo: #:17 >:13 s:30; #:16 >:13 s:29; S#:33 S>:26 S:59
13:46:02.215 : echo: #:16 >:13 s:29; #:16 >:14 s:30; S#:32 S>:27 S:59
13:46:03.214 : echo: #:17 >:13 s:30; #:17 >:13 s:30; S#:34 S>:26 S:60
13:46:04.214 : echo: #:16 >:13 s:29; #:16 >:14 s:30; S#:32 S>:27 S:59
13:46:05.212 : echo: #:16 >:14 s:30; #:17 >:13 s:30; S#:33 S>:27 S:60
13:46:06.212 : echo: #:17 >:13 s:30; #:16 >:13 s:29; S#:33 S>:26 S:59
03:30:36.779 : echo: #:8 >:7 s:15; #:10 >:7 s:17; #:8 >:6 s:14; #:8 >:7 s:15; S#:34 S>:27 S:61
03:30:37.778 : echo: #:8 >:6 s:14; #:10 >:7 s:17; #:9 >:7 s:16; #:8 >:6 s:14; S#:35 S>:26 S:61
03:30:38.778 : echo: #:8 >:6 s:14; #:11 >:7 s:18; #:8 >:6 s:14; #:8 >:7 s:15; S#:35 S>:26 S:61
03:30:39.777 : echo: #:8 >:6 s:14; #:10 >:7 s:17; #:8 >:8 s:16; #:8 >:6 s:14; S#:34 S>:27 S:61
03:30:40.780 : echo: #:8 >:6 s:14; #:11 >:7 s:18; #:8 >:6 s:14; #:8 >:6 s:14; S#:35 S>:25 S:60
03:30:41.780 : echo: #:9 >:6 s:15; #:10 >:7 s:17; #:8 >:6 s:14; #:9 >:6 s:15; S#:36 S>:25 S:61
03:30:42.779 : echo: #:8 >:6 s:14; #:10 >:8 s:18; #:8 >:6 s:14; #:8 >:6 s:14; S#:34 S>:26 S:60
03:30:43.778 : echo: #:9 >:6 s:15; #:10 >:7 s:17; #:8 >:7 s:15; #:9 >:6 s:15; S#:36 S>:26 S:62
#: draw a stripe
>: transfer a stripe
s: sum of of draw and transfer for one stripe
S#: sum of draws for a complete screen
S>: sum of transfers for a complete screen
S: time to draw and transfer a complete screen
2016-11-24 14:17:25 -06:00
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#define PAGE_HEIGHT 16 //256 byte framebuffer
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//#define PAGE_HEIGHT 32 //512 byte framebuffer
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2013-06-06 17:49:25 -05:00
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2015-04-27 05:15:36 -05:00
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#define LCD_PIXEL_WIDTH 128
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#define LCD_PIXEL_HEIGHT 64
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2013-06-06 17:49:25 -05:00
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#include <U8glib.h>
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2016-06-04 07:54:20 -05:00
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//set optimization so ARDUINO optimizes this file
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#pragma GCC optimize (3)
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// If you want you can define your own set of delays in Configuration.h
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//#define ST7920_DELAY_1 DELAY_0_NOP
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//#define ST7920_DELAY_2 DELAY_0_NOP
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//#define ST7920_DELAY_3 DELAY_0_NOP
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#if F_CPU >= 20000000
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2016-06-25 20:32:13 -05:00
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_1_NOP
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2016-07-02 08:32:21 -05:00
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#elif (MOTHERBOARD == BOARD_3DRAG) || (MOTHERBOARD == BOARD_K8200) || (MOTHERBOARD == BOARD_K8400)
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2016-06-25 20:32:13 -05:00
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_3_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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2016-06-14 04:08:28 -05:00
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#elif (MOTHERBOARD == BOARD_MINIRAMBO)
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2016-06-25 20:32:13 -05:00
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_4_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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2016-06-14 04:08:28 -05:00
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#elif (MOTHERBOARD == BOARD_RAMBO)
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2016-06-25 20:32:13 -05:00
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_0_NOP
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2016-06-04 07:54:20 -05:00
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#elif F_CPU == 16000000
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2016-06-25 20:32:13 -05:00
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#define CPU_ST7920_DELAY_1 DELAY_0_NOP
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#define CPU_ST7920_DELAY_2 DELAY_0_NOP
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#define CPU_ST7920_DELAY_3 DELAY_1_NOP
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2016-06-04 07:54:20 -05:00
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#else
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#error "No valid condition for delays in 'ultralcd_st7920_u8glib_rrd.h'"
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#endif
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2016-06-25 20:32:13 -05:00
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#ifndef ST7920_DELAY_1
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#define ST7920_DELAY_1 CPU_ST7920_DELAY_1
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#endif
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#ifndef ST7920_DELAY_2
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#define ST7920_DELAY_2 CPU_ST7920_DELAY_2
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#endif
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#ifndef ST7920_DELAY_3
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#define ST7920_DELAY_3 CPU_ST7920_DELAY_3
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#endif
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#define ST7920_SND_BIT \
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WRITE(ST7920_CLK_PIN, LOW); ST7920_DELAY_1; \
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WRITE(ST7920_DAT_PIN, val & 0x80); ST7920_DELAY_2; \
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WRITE(ST7920_CLK_PIN, HIGH); ST7920_DELAY_3; \
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val <<= 1
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2015-10-03 01:08:58 -05:00
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static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
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2016-06-25 20:32:13 -05:00
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ST7920_SND_BIT; // 1
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ST7920_SND_BIT; // 2
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ST7920_SND_BIT; // 3
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ST7920_SND_BIT; // 4
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ST7920_SND_BIT; // 5
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ST7920_SND_BIT; // 6
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ST7920_SND_BIT; // 7
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ST7920_SND_BIT; // 8
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2013-06-06 17:49:25 -05:00
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}
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2016-11-24 21:49:55 -06:00
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#if defined(DOGM_SPI_DELAY_US) && DOGM_SPI_DELAY_US > 0
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#define U8G_DELAY() delayMicroseconds(DOGM_SPI_DELAY_US)
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#else
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#define U8G_DELAY() u8g_10MicroDelay()
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#endif
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#define ST7920_CS() { WRITE(ST7920_CS_PIN,1); U8G_DELAY(); }
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#define ST7920_NCS() { WRITE(ST7920_CS_PIN,0); }
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#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xf8); U8G_DELAY(); }
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#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xfa); U8G_DELAY(); }
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#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xf0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4u)); U8G_DELAY(); }
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#define ST7920_WRITE_BYTES(p,l) { for (uint8_t i = l + 1; --i;) { ST7920_SWSPI_SND_8BIT(*p&0xf0); ST7920_SWSPI_SND_8BIT(*p<<4); p++; } U8G_DELAY(); }
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2013-06-06 17:49:25 -05:00
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2015-10-03 01:08:58 -05:00
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uint8_t u8g_dev_rrd_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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uint8_t i, y;
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switch (msg) {
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case U8G_DEV_MSG_INIT: {
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OUT_WRITE(ST7920_CS_PIN, LOW);
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OUT_WRITE(ST7920_DAT_PIN, LOW);
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OUT_WRITE(ST7920_CLK_PIN, HIGH);
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ST7920_CS();
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u8g_Delay(120); //initial delay for boot up
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ST7920_SET_CMD();
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ST7920_WRITE_BYTE(0x08); //display off, cursor+blink off
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ST7920_WRITE_BYTE(0x01); //clear CGRAM ram
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u8g_Delay(15); //delay for CGRAM clear
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ST7920_WRITE_BYTE(0x3E); //extended mode + GDRAM active
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2016-03-15 03:10:57 -05:00
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for (y = 0; y < (LCD_PIXEL_HEIGHT) / 2; y++) { //clear GDRAM
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2015-10-03 01:08:58 -05:00
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ST7920_WRITE_BYTE(0x80 | y); //set y
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ST7920_WRITE_BYTE(0x80); //set x = 0
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ST7920_SET_DAT();
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2016-03-13 00:38:55 -06:00
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for (i = 0; i < 2 * (LCD_PIXEL_WIDTH) / 8; i++) //2x width clears both segments
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2015-10-03 01:08:58 -05:00
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ST7920_WRITE_BYTE(0);
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2013-06-06 17:49:25 -05:00
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ST7920_SET_CMD();
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}
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2015-10-03 01:08:58 -05:00
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ST7920_WRITE_BYTE(0x0C); //display on, cursor+blink off
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ST7920_NCS();
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}
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break;
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2013-06-06 17:49:25 -05:00
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case U8G_DEV_MSG_STOP:
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break;
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2015-10-03 01:08:58 -05:00
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case U8G_DEV_MSG_PAGE_NEXT: {
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uint8_t* ptr;
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u8g_pb_t* pb = (u8g_pb_t*)(dev->dev_mem);
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y = pb->p.page_y0;
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ptr = (uint8_t*)pb->buf;
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ST7920_CS();
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for (i = 0; i < PAGE_HEIGHT; i ++) {
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ST7920_SET_CMD();
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if (y < 32) {
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ST7920_WRITE_BYTE(0x80 | y); //y
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ST7920_WRITE_BYTE(0x80); //x=0
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}
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else {
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ST7920_WRITE_BYTE(0x80 | (y - 32)); //y
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ST7920_WRITE_BYTE(0x80 | 8); //x=64
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2013-06-06 17:49:25 -05:00
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}
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2015-10-03 01:08:58 -05:00
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ST7920_SET_DAT();
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2016-03-15 03:10:57 -05:00
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ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); //ptr is incremented inside of macro
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2015-10-03 01:08:58 -05:00
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y++;
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2013-06-06 17:49:25 -05:00
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}
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2015-10-03 01:08:58 -05:00
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ST7920_NCS();
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}
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break;
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2013-06-06 17:49:25 -05:00
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}
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2016-11-24 21:49:55 -06:00
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#if PAGE_HEIGHT == 8
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return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
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#elif PAGE_HEIGHT == 16
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return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
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#else
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return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
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#endif
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2013-06-06 17:49:25 -05:00
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}
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2016-03-15 03:10:57 -05:00
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uint8_t u8g_dev_st7920_128x64_rrd_buf[(LCD_PIXEL_WIDTH) * (PAGE_HEIGHT) / 8] U8G_NOCOMMON;
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2015-10-03 01:08:58 -05:00
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u8g_pb_t u8g_dev_st7920_128x64_rrd_pb = {{PAGE_HEIGHT, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7920_128x64_rrd_buf};
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u8g_dev_t u8g_dev_st7920_128x64_rrd_sw_spi = {u8g_dev_rrd_st7920_128x64_fn, &u8g_dev_st7920_128x64_rrd_pb, &u8g_com_null_fn};
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2013-06-06 17:49:25 -05:00
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2015-10-03 01:08:58 -05:00
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class U8GLIB_ST7920_128X64_RRD : public U8GLIB {
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public:
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2016-06-22 20:22:17 -05:00
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U8GLIB_ST7920_128X64_RRD(uint8_t dummy) : U8GLIB(&u8g_dev_st7920_128x64_rrd_sw_spi) { UNUSED(dummy); }
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2013-06-06 17:49:25 -05:00
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};
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Decrease the needed nops to 1
by shitfing the left shift into the high phase.
```
2 cbi 0x2,1 ;set CLK //
1 in r18,__SREG__ //1
1-3 sbrc r24,7 //2-4
2 rjmp .L19 //4
1 cli .L19: //5
2 lds r25,258 lds r25,258 //7
1 andi r25,lo8(-2) ori r25,lo8(1) //8
2 sts 258,r25 sts 258,r25 //10
1 out __SREG__,r18 out __SREG__,r18 //11
2 .L3: rjmp .L3 //13 //2
2 sbi 0x2,1 ;reset CLK // //13-15 //2-4
1 lsl r24 ; val //1
1 nop //2
2 cbi 0x2,1 ;set CLK //4
...
```
2016-06-07 06:45:35 -05:00
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#pragma GCC reset_options
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2013-06-06 17:49:25 -05:00
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#endif //U8GLIB_ST7920
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#endif //ULCDST7920_H
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